Home of the Advanced Interface Bus (AIB) specification.
☆62Aug 30, 2022Updated 3 years ago
Alternatives and similar repositories for AIB-specification
Users that are interested in AIB-specification are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Advanced Interface Bus (AIB) die-to-die hardware open source☆149Sep 23, 2024Updated last year
- AIB Generator: Analog hardware compiler for AIB PHY☆40Aug 22, 2020Updated 5 years ago
- ☆69Jan 7, 2023Updated 3 years ago
- ☆27Aug 2, 2021Updated 5 years ago
- ☆12Jul 3, 2020Updated 6 years ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- This simulator models multi core systems, intended primarily for studies on main memory management techniques. It models a trace-based ou…☆12Jan 18, 2016Updated 10 years ago
- Nebula: Deep Neural Network Benchmarks in C++☆13Updated this week
- RTL Network-on-Chip Router Design in SystemVerilog by Andrea Galimberti, Filippo Testa and Alberto Zeni☆155Mar 19, 2018Updated 8 years ago
- A toolchain for rapid design space exploration of chiplet architectures☆87Jul 25, 2025Updated last year
- An open-source 3D IC design platform that leverages existing open EDA tools while incorporating tailored abstractions and customizations …☆18Oct 29, 2024Updated last year
- EE P 520 A Wi 20: Software Engineering For Embedded Applications☆11Mar 13, 2020Updated 6 years ago
- SVA examples and demonstration☆18Sep 8, 2020Updated 5 years ago
- Fixed-point library with bittrue implementations in VHDL (for FPGA) and python (for simulation)☆29Jul 7, 2026Updated last month
- Explore the behavior SystemC kernel event-driven simulator (aka "the engine")☆12Jan 17, 2024Updated 2 years ago
- GPUs on demand by Runpod - Special Offer Available • AdRun AI, ML, and HPC workloads on powerful cloud GPUs—without limits or wasted spend. Deploy GPUs in under a minute and pay by the second.
- UART cocotb module☆11Jun 30, 2021Updated 5 years ago
- ☆15Mar 6, 2021Updated 5 years ago
- Network on Chip for MPSoC☆29Updated this week
- ☆30Dec 16, 2022Updated 3 years ago
- An EDA toolchain for integrated core-memory interval thermal simulations of 2D, 2.5, and 3D multi-/many-core processors☆57Jun 23, 2026Updated last month
- Xilinx Unisim Library in Verilog☆93Jul 22, 2020Updated 6 years ago
- Altera Advanced Synthesis Cookbook 11.0☆117Apr 7, 2023Updated 3 years ago
- ☆13Jul 5, 2026Updated last month
- Video Effects on VGA☆15Jan 7, 2019Updated 7 years ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- AXI Formal Verification IP☆25Apr 28, 2021Updated 5 years ago
- C program for Drawwing Complex graphics with L-edit☆10Jan 7, 2020Updated 6 years ago
- A Vector Caching Scheme for Streaming FPGA SpMV Accelerators☆10Sep 7, 2015Updated 10 years ago
- A vector graphics renderer for bgfx, based on ideas from NanoVG and ImDrawList (Dear ImGUI)☆11Jun 29, 2026Updated last month
- RSSI-based OFDM signal classification using a machine learning algorithm.☆12May 15, 2018Updated 8 years ago
- ☆25Aug 9, 2022Updated 4 years ago
- fakeram generator for use by researchers who do not have access to commercial ram generators☆44Jan 13, 2023Updated 3 years ago
- 功能简介:程序通过Technology文件转出准确的叠层和材料参数,生成XML控制文档,把GDS文件导入3D Layout或者SIwave中进行仿真,适用于2.5D/3D封装的Interposer仿真。 Readme: The program extract acc…☆32Aug 5, 2026Updated last week
- ⛔ DEPRECATED ⛔ RISC-V manycore accelerator for HERO, bigPULP hardware platform☆50Jan 6, 2022Updated 4 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Common elements for FPGA Design (FIFOs, RAMs, etc.)☆41Feb 24, 2025Updated last year
- 🔥 Technology-agnostic FPGA stress-test: maximum logic utilization and high dynamic power consumption.☆33Aug 20, 2022Updated 3 years ago
- Toy RISC-V emulator☆15Oct 10, 2017Updated 8 years ago
- Wide Bandwidth low noise amplifier 20Hz-20MHz 20/40dB☆11Oct 16, 2019Updated 6 years ago
- A SystemVerilog-based simulation and design of a Last Level Cache (LLC) implementing the MESI protocol, featuring Pseudo-LRU replacement,…☆17Mar 8, 2026Updated 5 months ago
- A library and command-line tool for querying a Verilog netlist.☆30Jun 13, 2022Updated 4 years ago
- Documentation for the entire CGRAFlow☆19Sep 17, 2021Updated 4 years ago