The-OpenROAD-Project / AutoCellGenLinks
☆25Updated 5 months ago
Alternatives and similar repositories for AutoCellGen
Users that are interested in AutoCellGen are comparing it to the libraries listed below
Sorting:
- Analog Placement Quality Prediction☆24Updated 2 years ago
- CUGR, VLSI Global Routing Tool Developed by CUHK☆139Updated 2 years ago
- A Design Rule Checker with GPU Acceleration☆56Updated 2 years ago
- This GitHub repo is for the OpenROAD and CircuitOps Tutorial at ASP-DAC 2024☆52Updated 8 months ago
- Mirror of the Si2 LEF/DEF parser (v5.8)☆17Updated 4 years ago
- RePlAce global placement tool☆239Updated 5 years ago
- Open Source Detailed Placement engine☆39Updated 5 years ago
- Pin-Accessible Legalization for Mixed-Cell-Height Circuits☆30Updated 3 years ago
- ☆31Updated 3 years ago
- Library for VLSI CAD Design Useful parsers and solvers' api are implemented.☆179Updated 4 months ago
- Rsyn – An Extensible Physical Synthesis Framework☆132Updated last year
- Official open source repository for "A Timing Engine Inspired Graph Neural Network Model for Pre-Routing Slack Prediction" (DAC 2022)☆77Updated last year
- Machine Generated Analog IC Layout☆255Updated last year
- Analog IC symmetry extraction benchmark of AncstrGNN☆10Updated last year
- BoxRouter2.0 is a new global router for ultimate routability. It is inspired by BoxRouter [1], but can perform multi-layer routing with 2…☆21Updated 6 years ago
- Dr. CU, VLSI Detailed Routing Tool Developed by CUHK☆137Updated 2 years ago
- Artificial Netlist Generator☆43Updated last year
- Xplace 3.0: An Extremely Fast, Extensible and Deterministic Placement Framework with Detailed-Routability and Timing Optimization☆139Updated 3 months ago
- ☆11Updated last year
- GT3 PDK☆14Updated last month
- Reimplementation of the VLSI placement algorithm: ePlace and ePlace-MS☆50Updated 11 months ago
- VLSI EDA Global Router☆75Updated 7 years ago
- This Repo Contains the Source Code and Pretrained Model for the Paper "Layout Hotspot Detection with Feature Tensor Generation and Deep B…☆48Updated 10 months ago
- GDSII File Parsing, IC Layout Analysis, and Parameter Extraction☆126Updated 2 years ago
- Circuit release of the MAGICAL project☆38Updated 5 years ago
- ☆47Updated last year
- UCSD Detailed Router☆91Updated 4 years ago
- ☆58Updated 4 years ago
- ☆61Updated 3 weeks ago
- DATC RDF☆50Updated 5 years ago