freecores / wb_dma
WISHBONE DMA/Bridge IP Core
☆18Updated 10 years ago
Alternatives and similar repositories for wb_dma:
Users that are interested in wb_dma are comparing it to the libraries listed below
- PCI bridge☆18Updated 10 years ago
- A 32 bit RISCV Based SOC with QSpi , Uart and 8 bit SDRAM Controller tagetted to efebless shuttle program☆18Updated 2 years ago
- DDR3 SDRAM controller☆18Updated 10 years ago
- Generic AXI master stub☆19Updated 10 years ago
- ☆21Updated 5 years ago
- 100 MB/s Ethernet MAC Layer Switch☆14Updated 10 years ago
- WISHBONE Interconnect☆11Updated 7 years ago
- ☆16Updated 5 years ago
- Quad SPI Flash XIP Controller with a direct mapped cache☆11Updated 4 years ago
- Contains the System Verilog description for a simplified USB host that implements the transaction, data-link, and physical layers of the …☆13Updated 10 years ago
- Pcie to AXI Bridge in Xilinx series-7 Kintex and Artix devices☆29Updated 8 years ago
- USB 1.1 Host and Function IP core☆21Updated 10 years ago
- mirror of https://git.elphel.com/Elphel/eddr3☆40Updated 7 years ago
- USB -> AXI Debug Bridge☆36Updated 3 years ago
- ☆25Updated 3 years ago
- ☆19Updated 5 years ago
- ☆18Updated 8 years ago
- UART -> AXI Bridge☆60Updated 3 years ago
- Wishbone interconnect utilities☆39Updated last month
- DDR3 SDRAM Memory Controller Design & Synthesis using System Verilog☆30Updated 6 years ago
- An SPI to AXI4-lite bridge for easy interfacing of airhdl register banks with any microcontroller.☆49Updated last year
- Various low power labs using sky130☆11Updated 3 years ago
- Pipelined FFT/IFFT 64 points processor☆12Updated 10 years ago
- SPI-Flash XIP Interface (Verilog)☆36Updated 3 years ago
- It is Gate level netlist of MAXVY's MIPI I3C Basic Master Controller IP along with APB interface support.☆16Updated 5 years ago
- SystemVerilog testbench for an Ethernet 10GE MAC core☆45Updated 8 years ago
- Parameterised Asynchronous AHB3-Lite to APB4 Bridge.☆42Updated 10 months ago
- AXI3 Bus Functional Models (Initiator & Target)☆28Updated 2 years ago
- Implementation of the PCIe physical layer☆35Updated 2 months ago
- To design test bench of the APB protocol☆17Updated 4 years ago