DSP WishBone Compatible Cores
☆14Jul 17, 2014Updated 12 years ago
Alternatives and similar repositories for wdsp
Users that are interested in wdsp are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- FIR，FFT based on Verilog☆14Dec 3, 2017Updated 8 years ago
- WISHBONE DMA/Bridge IP Core☆18Jul 17, 2014Updated 12 years ago
- WISHBONE Interconnect☆11Oct 1, 2017Updated 8 years ago
- Generic AHB master stub☆12Jul 17, 2014Updated 12 years ago
- AHB3-Lite to Wishbone Bridge☆13Mar 26, 2019Updated 7 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- double_fpu_verilog☆21Jul 17, 2014Updated 12 years ago
- 10_100_1000 Mbps tri-mode ethernet MAC☆11Jul 17, 2014Updated 12 years ago
- Hardware Division Units☆10Jul 17, 2014Updated 12 years ago
- Zet - The x86 (IA-32) open implementation☆23Jul 17, 2014Updated 12 years ago
- Verilog code that does 2D Low Pass Filter on a greyscale image☆10Sep 22, 2015Updated 10 years ago
- Theia: ray graphic processing unit☆20Jul 17, 2014Updated 12 years ago
- Project in Course named DESIGN AND IMPLEMENTATION OF COMMUNICATION PROTOCOLS in FCU☆17Oct 18, 2014Updated 11 years ago
- WISHBONE Builder☆15Sep 10, 2016Updated 9 years ago
- PS2 interface☆18Dec 4, 2017Updated 8 years ago
- Serverless GPU API endpoints on Runpod - Get Bonus Credits • AdSkip the infrastructure headaches. Auto-scaling, pay-as-you-go, no-ops approach lets you focus on innovating your application.
- Small and simple, primitive SoC with GPU, CPU, RAM, GPIO☆14Dec 29, 2016Updated 9 years ago
- Wishbone SATA Controller☆28Jul 9, 2026Updated last month
- Ethernet 10GE MAC☆47Jul 17, 2014Updated 12 years ago
- Verification IP for Watchdog☆13Apr 6, 2021Updated 5 years ago
- SPI Master Core clone from OpenCores☆14Oct 4, 2013Updated 12 years ago
- Pipelined FFT/IFFT 64 points processor☆11Jul 17, 2014Updated 12 years ago
- USB 1.1 PHY☆11Jul 17, 2014Updated 12 years ago
- Educational 16-bit MIPS Processor☆18Feb 16, 2019Updated 7 years ago
- VGA LCD Core (OpenCores)☆15May 22, 2018Updated 8 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- 基于玄铁openc906，搭建最小化SoC系统☆21Apr 7, 2025Updated last year
- AES☆16Oct 4, 2022Updated 3 years ago
- ☆13Nov 5, 2017Updated 8 years ago
- CORDIC VLSI-IP for deep learning activation functions☆15Jul 13, 2019Updated 7 years ago
- SDRAM controller with multiple wishbone slave ports☆30Oct 26, 2018Updated 7 years ago
- A Direct Memory Access Controller (DMAC) with AHB-lite bus interface☆19Oct 6, 2024Updated last year
- The CORDIC algorithm implemented in Octave/MATLAB and Verilog☆32Mar 31, 2015Updated 11 years ago
- Bluespec H.264 Decoder☆12Jul 17, 2014Updated 12 years ago
- DDR3 SDRAM Memory Controller Design & Synthesis using System Verilog☆33Nov 6, 2018Updated 7 years ago
- End-to-end encrypted email - Proton Mail • AdSpecial offer: 40% Off Yearly / 80% Off First Month. All Proton services are open source and independently audited for security.
- AHB-lite, AHB-APB bridge and extended APB side architecture in SystemVerilog☆21Sep 2, 2023Updated 2 years ago
- A collection of debugging busses developed and presented at zipcpu.com☆45Jan 18, 2024Updated 2 years ago
- UVM Testbench for synchronus fifo☆20Aug 28, 2020Updated 5 years ago
- FPGA纯逻辑实现modbus通信☆27Sep 5, 2022Updated 3 years ago
- DDR3 SDRAM controller☆18Jul 17, 2014Updated 12 years ago
- The Design and Implementation of a Pulse Compression Filter on an FPGA.☆36Aug 7, 2021Updated 5 years ago
- Verification of Ethernet Switch System Verilog☆12Oct 21, 2016Updated 9 years ago