AES
☆15Oct 4, 2022Updated 3 years ago
Alternatives and similar repositories for tiny_aes
Users that are interested in tiny_aes are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- AES-based-on-FPGA developed by verilog.☆23Apr 23, 2020Updated 6 years ago
- RTL implementation of a ray-tracing GPU☆16Dec 18, 2012Updated 13 years ago
- Generic AHB master stub☆12Jul 17, 2014Updated 11 years ago
- C++ and Verilog to implement AES128☆24Apr 30, 2018Updated 8 years ago
- RISC-V vector and tensor compute extensions for Vortex GPGPU acceleration for ML workloads. Optimized for transformer models, CNNs, and g…☆24Apr 25, 2025Updated last year
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- Open-source AI Accelerator Stack integrating compute, memory, and software — from RTL to PyTorch.☆26Jun 7, 2026Updated last week
- DSP WishBone Compatible Cores☆14Jul 17, 2014Updated 11 years ago
- The 3rd Iteration of the Berkeley RISC-V DMA Accelerator☆28Nov 21, 2019Updated 6 years ago
- A simple cycle-accurate DaDianNao simulator☆13Mar 27, 2019Updated 7 years ago
- AES-128 Encryption☆11Jul 17, 2014Updated 11 years ago
- A port of the DesignStart Cortex-M0 system to the Diligentinc Arty board☆13Sep 7, 2018Updated 7 years ago
- Formal Verification of RISC V IM Processor☆11Mar 27, 2022Updated 4 years ago
- DMA core compatible with AHB3-Lite☆13Mar 30, 2019Updated 7 years ago
- Accelerating the AES algorithm on an FPGA and comparing the speedup with both AES and Modified AES algorithms☆35Dec 10, 2021Updated 4 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Verification of Ethernet Switch System Verilog☆12Oct 21, 2016Updated 9 years ago
- Theia: ray graphic processing unit☆20Jul 17, 2014Updated 11 years ago
- Implementation of the Snappy compression algorithm as a RoCC accelerator☆12Jul 29, 2019Updated 6 years ago
- AHB DMA 32 / 64 bits☆62Jul 17, 2014Updated 11 years ago
- DMA controller for CNN accelerator☆14May 22, 2017Updated 9 years ago
- High level Data Link Layer Control (HDLC) Protocol (16 bit) implementation using VHDL hardware description language.☆31Dec 1, 2016Updated 9 years ago
- A CIC filter implemented in Verilog☆25Sep 7, 2015Updated 10 years ago
- Pipelined FFT/IFFT 256 points processor☆10Jul 17, 2014Updated 11 years ago
- ☆14May 15, 2023Updated 3 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Hardware Division Units☆10Jul 17, 2014Updated 11 years ago
- turbo 8051☆30Aug 30, 2017Updated 8 years ago
- This is a circular buffer controller used in FPGA.☆35Jan 12, 2016Updated 10 years ago
- 10 Gigabit Ethernet MAC Core UVM Verification☆19Oct 5, 2023Updated 2 years ago
- WISHBONE DMA/Bridge IP Core☆18Jul 17, 2014Updated 11 years ago
- 100 MB/s Ethernet MAC Layer Switch☆15Jul 17, 2014Updated 11 years ago
- Hardware Implementation of Advanced Encryption Standard Algorithm in Verilog☆42Jun 4, 2017Updated 9 years ago
- RTL code for AXI4 Interconnect (Verilog). Supports weighted round-robin arbitration, n-channel master, 4Kb splitting, reorder transaction…☆30Mar 13, 2025Updated last year
- RTL code of some arbitration algorithm☆16Aug 25, 2019Updated 6 years ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- ☆10Nov 8, 2019Updated 6 years ago
- ☆16Apr 21, 2019Updated 7 years ago
- Verification of DMA Controller for 8086 Microprocessor Systems using OO Test bench☆17Jun 24, 2020Updated 5 years ago
- Classify modulation of signals☆16Jan 16, 2020Updated 6 years ago
- RISC-V SIMD Superscalar Dual-Issue Processor☆30Apr 24, 2025Updated last year
- Verilog I2C Slave☆26Aug 11, 2014Updated 11 years ago
- Hamming ECC Encoder and Decoder to protect memories☆36Jan 28, 2025Updated last year