第六届龙芯杯混元形意太极门战队作品
☆18May 15, 2022Updated 3 years ago
Alternatives and similar repositories for ChiselMIPS
Users that are interested in ChiselMIPS are comparing it to the libraries listed below
Sorting:
- A simple full system emulator. Currently support RV64IMACSU and MIPS32 and LoongArch32. Capable of booting Linux. Suitable for education …☆119Oct 31, 2024Updated last year
- Fuzzing General-Purpose Hardware Designs with Software Fuzzers☆24Jan 11, 2026Updated last month
- uCore MIPS32 porting☆18Dec 16, 2019Updated 6 years ago
- 复旦大学FDU1.1队在第四届“龙芯杯”的参赛作品☆45Aug 24, 2020Updated 5 years ago
- High performance LA32R out-of-order processor core. (NSCSCC 2023 Special Prize)☆83Aug 29, 2023Updated 2 years ago
- A RISC-V core running Debian (and a LoongArch core running Linux).☆22Nov 24, 2025Updated 3 months ago
- Running ahead of memory latency - Part II project☆10Jan 7, 2023Updated 3 years ago
- A TUI signal waveform viewer.☆23Mar 27, 2025Updated 11 months ago
- 2020龙芯杯个人赛 简易双发射60M(含ibuffer)☆41Aug 24, 2020Updated 5 years ago
- SoC for CQU Dual Issue Machine☆12Sep 20, 2022Updated 3 years ago
- Lower chisel memories to SRAM macros☆13Mar 25, 2024Updated last year
- ☆11Apr 29, 2022Updated 3 years ago
- Header-only C/C++ static keys to avoid the overhead of conditional branches☆14Feb 10, 2024Updated 2 years ago
- A dual core RISC-V processor (using PULP platform SoC) implemented on a Digilent Arty S7-50 FPGA board.☆14Aug 7, 2022Updated 3 years ago
- Formal verification tools for Chisel and RISC-V☆13Jul 2, 2024Updated last year
- A Symmetric Multiprocessing OS Kernel over RISC-V☆32Jun 3, 2022Updated 3 years ago
- ☆15Dec 15, 2022Updated 3 years ago
- rewrite subset of linux 2.6 by OOP, C++ advanced topics☆10Jul 22, 2021Updated 4 years ago
- Dockerfile with Vivado for CI☆27Apr 17, 2020Updated 5 years ago
- NSCSCC 2020 - Yet Another MIPS Processor☆14Aug 7, 2021Updated 4 years ago
- A toy compiler that translates SysY (a subset of C language) into ARMv7a assembly.☆12Sep 27, 2021Updated 4 years ago
- CQU Dual Issue Machine☆38Jun 23, 2024Updated last year
- NSCSCC 2023 The Second Prize. TEAM PUA FROM HDU.☆13Mar 29, 2025Updated 11 months ago
- A small RISC-V kernel coding by C, tested on sifive unmatched board.☆16Aug 20, 2022Updated 3 years ago
- UltraMIPS SoC composed of dual-issue cpu, pipeline Cache and systematic peripheral.☆147Jun 23, 2024Updated last year
- Value Change Dump (VCD) parser☆38Jan 9, 2026Updated last month
- ☆17Mar 17, 2022Updated 3 years ago
- 我的一生一芯项目☆16Dec 14, 2021Updated 4 years ago
- 《计算机设计与实践》测试框架☆17Jun 28, 2022Updated 3 years ago
- LLCL-MIPS is a superscalar MIPS processor, which supports MIPS Release 1 instructions and is capable of booting linux kernel. (第五届龙芯杯特等奖作…☆38Jan 26, 2022Updated 4 years ago
- Examine and discover LoongArch instructions☆22Jul 11, 2025Updated 7 months ago
- 重庆大学操作系统课程实验文档☆20Dec 7, 2025Updated 2 months ago
- A Verilator based SoC simulator that allows you to define AXI Slave interface in software.☆51Dec 18, 2025Updated 2 months ago
- A Rust VCD parser intended to be the backend of a Waveform Viewer(built using egui) that supports dynamically loaded rust plugins.☆50Dec 30, 2024Updated last year
- Linux on RISC-V on FPGA (LOROF): RV64GC Sv39 Quad-Core Superscalar Out-of-Order Virtual Memory CPU☆15Feb 23, 2026Updated last week
- Parendi: Thousand-way Parallel RTL Simulation on the Graphcore IPU☆25Nov 26, 2025Updated 3 months ago
- a Quad-issue, Out-of-order Superscalar MIPS Processor Implemented in SystemVerilog☆50Dec 11, 2023Updated 2 years ago
- Nintendo Entertainment System emulator☆20Aug 21, 2020Updated 5 years ago
- RISC-V VM in Bash☆29Apr 3, 2025Updated 11 months ago