Alternatives and similar repositories for ChiselMIPS:

Users that are interested in ChiselMIPS are comparing it to the libraries listed below

• cyyself / soc-simulator
  A Verilator based SoC simulator that allows you to define AXI Slave interface in software.
  ☆47Updated 4 months ago
• Maxpicca-Li / CDIM
  CQU Dual Issue Machine
  ☆35Updated 8 months ago
• Superscalar-HIT-Core / Superscalar-HIT-Core-NSCSCC2020
  a Quad-issue, Out-of-order Superscalar MIPS Processor Implemented in SystemVerilog
  ☆47Updated last year
• cyyself / CDIM-SoC
  SoC for CQU Dual Issue Machine
  ☆12Updated 2 years ago
• cassuto / yamp-32
  NSCSCC 2020 - Yet Another MIPS Processor
  ☆14Updated 3 years ago
• Tang-Haojin / YuQuan
  A RISC-V core running Debian (and a LoongArch core running Linux).
  ☆22Updated last year
• nscscc2019ucas / nscscc2019ucas
  ☆34Updated 5 years ago
• OpenXiangShan / Deterload
  Xiangshan deterministic workloads generator
  ☆17Updated 2 weeks ago
• FurryAcetylCoA / gtkwave-filter-process-RISC
  A tool to decode RISC-V and LoongArch and MIPS instructions in gtkwave
  ☆30Updated 11 months ago
• AlwenXXD / nscscc2021
  龙芯杯21个人赛作品
  ☆34Updated 3 years ago
• HIT-MaRiver-mips / cpucore-mariver
  ☆32Updated last year
• huang-jl / LLCL-MIPS
  LLCL-MIPS is a superscalar MIPS processor, which supports MIPS Release 1 instructions and is capable of booting linux kernel. （第五届龙芯杯特等奖作…
  ☆34Updated 3 years ago
• OpenXiangShan / xfuzz
  Fuzzing General-Purpose Hardware Designs with Software Fuzzers
  ☆16Updated 2 weeks ago
• LainChip / LainCore
  Linux-capable in-order superscaler LoongArch32r processor. Silicon-proven.
  ☆38Updated 7 months ago
• yuhanzhu612 / OSCPU
  我的一生一芯项目
  ☆16Updated 3 years ago
• NSCSCC-2020-Fudan / FDU1.1-NSCSCC
  复旦大学FDU1.1队在第四届“龙芯杯”的参赛作品
  ☆42Updated 4 years ago
• name1e5s / Sirius
  Asymmetric dual issue in-order microprocessor.
  ☆34Updated 5 years ago
• amadeus-mips / amadeus-mips
  ☆14Updated 4 years ago
• zencove-thu / zencove-zoom
  Highly configurable out-of-order MIPS32 processor, capable of booting Linux.
  ☆38Updated last year
• ljwljwljwljw / DiplomaticBackend
  ☆17Updated 3 years ago
• Clo91eaf / PUA-MIPS
  NSCSCC 2023 The Second Prize. TEAM PUA FROM HDU.
  ☆10Updated 11 months ago
• pku-liang / hestia
  ☆12Updated 2 months ago
• gmlayer0 / wired
  Linux-capable out-of-order superscaler multicore LoongArch32 (LA32 / LA32R) processor.
  ☆18Updated 7 months ago
• chipsalliance / rvdecoderdb
  The Scala parser to parse riscv/riscv-opcodes generate
  ☆14Updated last month
• NOP-Processor / NOP-Core
  High performance LA32R out-of-order processor core. (NSCSCC 2023 Special Prize)
  ☆76Updated last year
• tastynoob / aura-core
  "aura" my super-scalar O3 cpu core
  ☆24Updated 9 months ago
• ftppz / ShanghaiTech-YSYX
  Unofficial guide for ysyx students applying to ShanghaiTech University
  ☆21Updated 3 weeks ago
• gilgamsh / GenshinCPU
  Our repository for NSCSCC
  ☆19Updated 3 weeks ago