Alternatives and similar repositories for SOL-s-Verilog-Cheatsheet-for-Not-So-Beginners

Users that are interested in SOL-s-Verilog-Cheatsheet-for-Not-So-Beginners are comparing it to the libraries listed below

• YAVGroup / Verilog-OJ
  Online judge server for Verilog | verilogoj.ustc.edu.cn
  ☆82Updated last year
• cyyself / soc-simulator
  A Verilator based SoC simulator that allows you to define AXI Slave interface in software.
  ☆49Updated 3 weeks ago
• NSCSCC-2020-Fudan / FDU1.1-NSCSCC
  复旦大学FDU1.1队在第四届“龙芯杯”的参赛作品
  ☆44Updated 5 years ago
• AlwenXXD / nscscc2021
  龙芯杯21个人赛作品
  ☆35Updated 4 years ago
• NJU-ProjectN / nvboard
  NJU Virtual Board
  ☆291Updated last month
• OSCPU / ysyx-workbench
  ☆156Updated last week
• cyyself / cemu
  A simple full system emulator. Currently support RV64IMACSU and MIPS32 and LoongArch32. Capable of booting Linux. Suitable for education …
  ☆117Updated 11 months ago
• MaZirui2001 / Zircon
  ☆29Updated 8 months ago
• RickyTino / MangoMIPS32
  A softcore microprocessor of MIPS32 architecture.
  ☆40Updated last year
• fluctlight001 / Generic-Cache-Module
  适用于龙芯杯团队赛入门选手的应急cache模块
  ☆29Updated last year
• ysyx-org / jemu-decoder
  The decoder library for jemu execution and web documentation
  ☆54Updated 2 years ago
• loongson-education / nscscc-wiki
  NSCSCC 信息整合
  ☆252Updated 4 years ago
• secure-v / vsh
  VSH（SHell for Visualizing vcd file）项目为数字波形文件命令行查看器。
  ☆24Updated last week
• MaxXSoft / Fuxi
  Fuxi (伏羲) is a 32-bit pipelined RISC-V processor written in Chisel3.
  ☆175Updated 4 years ago
• SocialistDalao / UltraMIPS_NSCSCC
  UltraMIPS SoC composed of dual-issue cpu, pipeline Cache and systematic peripheral.
  ☆143Updated last year
• Clo91eaf / PUA-MIPS
  NSCSCC 2023 The Second Prize. TEAM PUA FROM HDU.
  ☆13Updated 6 months ago
• arch-simulator-sig / advanced-computer-architecture
  体系结构研讨 + ysyx高阶大纲 (WIP
  ☆180Updated last year
• OSCPU / ysyx
  一生一芯的信息发布和内容网站
  ☆135Updated last year
• MrAMS / Nagi
  CPU敏捷开发框架（龙芯杯2024）
  ☆25Updated last year
• NOP-Processor / NOP-Core
  High performance LA32R out-of-order processor core. (NSCSCC 2023 Special Prize)
  ☆82Updated 2 years ago
• NJU-ProjectN / riscv-tests-am
  ☆14Updated 2 months ago
• shinezyy / micro-arch-training
  How to make undergraduates or new graduates ready for advanced computer architecture research or modern CPU design
  ☆594Updated last year
• ysyx-ta / ysyx-summer-readings
  ☆67Updated last year
• Silverster98 / bit_nscscc_suggestion
  为了更好地帮助后来的同学参加龙芯杯，草拟了这份建议，望对后来人有所帮助
  ☆130Updated 4 years ago
• fluctlight001 / cpu_for_nscscc2020
  2020龙芯杯个人赛 简易双发射60M（含ibuffer）
  ☆40Updated 5 years ago
• NoAXI / NoAXI-LoongArch-CPU
  Second Prize in NSCSCC 2024. Out-of-order CPU design from HDU. 2024年全国大学生计算机系统能力大赛CPU设计赛（龙芯杯）团队赛二等奖作品
  ☆20Updated last year
• hitwh-nscscc / simple-5stage-pipeline-MIPS-imple
  和我一步一步实现一个最简单的、带数据前推及流水线暂停的32位静态五级流水MIPS
  ☆85Updated 4 years ago
• rand-fly / nscscc2023
  ☆17Updated last year
• fluctlight001 / cpu_for_nscscc2022_single
  2022年龙芯杯个人赛 单发射110M（含icache）
  ☆48Updated 3 years ago
• OSCPU / ysyxSoC
  ☆87Updated 2 weeks ago