A paper review list for computer architecture and systems research, maintained by the LEMONADE group at Peking University.
☆22Oct 15, 2026Updated this week
Alternatives and similar repositories for review
Users that are interested in review are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- This is a project created and completed by team BOOM(Beihang OO masters).This is a superscalar processor with a 13-stage out-of-order dua…☆18Sep 29, 2024Updated 2 years ago
- Linux-capable in-order superscaler LoongArch32r processor. Silicon-proven.☆49Jul 25, 2024Updated 2 years ago
- ☆22Dec 3, 2025Updated 10 months ago
- Scaling Graph Processing on HBM-enabled FPGAs with Heterogeneous Pipelines☆21Aug 8, 2022Updated 4 years ago
- Course Project for High Level Chip Design (高层次芯片设计)☆18Jan 2, 2025Updated last year
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Mars with BUAA CO extension by Toby Shi☆39Jun 16, 2026Updated 4 months ago
- Open source RTL implementation of Tensor Core, Sparse Tensor Core, BitWave and SparSynergy in the article: "SparSynergy: Unlocking Flexib…☆26Aug 29, 2026Updated last month
- ☆25Aug 11, 2024Updated 2 years ago
- Data Points Oriented Online Judge system for OO course☆35Jun 15, 2024Updated 2 years ago
- ☆35Aug 22, 2023Updated 3 years ago
- Official implementation of "SentenceKV: Efficient LLM Inference via Sentence-Level Semantic KV Caching" (COLM 2025). A novel KV cache com…☆15Sep 29, 2025Updated last year
- ☆11Nov 27, 2024Updated last year
- [NeurIPS'24] Official implement of "PrivCirNet: Efficient Private Inference via Block Circulant Transformation"☆14Feb 26, 2026Updated 7 months ago
- An accelerator for high-dimensional approximate nearest neighbor search☆15May 17, 2025Updated last year
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- A Verilator based SoC simulator that allows you to define AXI Slave interface in software.☆54Mar 31, 2026Updated 6 months ago
- Here are some implementations of basic hardware units in RTL language (verilog for now), which can be used for area/power evaluation and …☆15Aug 25, 2023Updated 3 years ago
- System-on-chip design for NOP in NSCSCC 2023.☆15Aug 21, 2023Updated 3 years ago
- ☆18Jul 30, 2021Updated 5 years ago
- ☆22Jul 13, 2026Updated 3 months ago
- A simple MIPS Simulator that can simulate execution in MIPS for a small subset of instructions under several restrictions☆10Sep 10, 2019Updated 7 years ago
- Deploy llama2.c on the OpenLA500 SoC with custom AI accelerator (FPGA)☆24Jun 16, 2026Updated 4 months ago
- SYSU-ARCH is a LAB that focuses on the use and extending of simulators.☆10Dec 19, 2022Updated 3 years ago
- Implementation of "Orchestrating Dual-Boundaries: An Arithmetic Intensity Inspired Acceleration Framework for Diffusion Language Models"☆24Dec 4, 2025Updated 10 months ago
- GPUs on demand by Runpod - Special Offer Available • AdRun AI, ML, and HPC workloads on powerful cloud GPUs—without limits or wasted spend. Deploy GPUs in under a minute and pay by the second.
- Lab for Digital Design and Computer Architecture Spring 2022 (252-0028-00L) (ETH).☆14Mar 1, 2023Updated 3 years ago
- BOOM's Simulation Accelerator.☆13Dec 16, 2021Updated 4 years ago
- ETH Computer Architecture - Fall 2020☆13Feb 26, 2021Updated 5 years ago
- A classic 5-stage rv32i(incomplete) toy implementation based on powerful SpinalHDL☆10Jul 5, 2021Updated 5 years ago
- This repository contains a SystemVerilog implementation of a parametrized Round Robin arbiter with three instantiation options☆13Jan 28, 2024Updated 2 years ago
- A Full-System Framework for Simulating NDP devices from Caches to DRAM☆21Jan 12, 2024Updated 2 years ago
- Implemented gshare, tournament, perceptron branch predictors along with a combination of gshare and tournament☆13Feb 13, 2018Updated 8 years ago
- Wallace and Dadda tree multiplier generator in vhdl and verilog☆14Mar 14, 2026Updated 7 months ago
- The official code implementation for paper "PM-KVQ: Progressive Mixed-precision KV Cache Quantization for Long-CoT LLMs"☆31May 24, 2025Updated last year
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Code for the paper "Searching Privacy Risks in Multi-Agent Systems via Simulation"☆25Oct 13, 2025Updated last year
- A retargetable and extensible synthesis-based compiler for modern hardware architectures☆21Nov 20, 2025Updated 10 months ago
- Open-source 8×8 INT8 systolic array inference accelerator — from RTL to bitstream☆26Aug 2, 2026Updated 2 months ago
- ☆21Jul 3, 2026Updated 3 months ago
- Single Cycle and Pipeline CPU of RISC-V Architecture designed for Digital Design and Computer Organization Experiments 2021, NJU☆14Jan 17, 2022Updated 4 years ago
- Artifact for Oaken: Fast and Efficient LLM Serving with Online-Offline Hybrid KV Cache Quantization☆20May 9, 2025Updated last year
- APB Logic☆29Sep 24, 2026Updated 3 weeks ago