Alternatives and similar repositories for cemu

Users that are interested in cemu are comparing it to the libraries listed below

• cyyself / soc-simulator
  A Verilator based SoC simulator that allows you to define AXI Slave interface in software.
  ☆49Updated last month
• AlwenXXD / nscscc2021
  龙芯杯21个人赛作品
  ☆35Updated 4 years ago
• LainChip / LainCore
  Linux-capable in-order superscaler LoongArch32r processor. Silicon-proven.
  ☆45Updated last year
• NOP-Processor / NOP-Core
  High performance LA32R out-of-order processor core. (NSCSCC 2023 Special Prize)
  ☆82Updated 2 years ago
• Maxpicca-Li / CDIM
  CQU Dual Issue Machine
  ☆37Updated last year
• OpenXiangShan / gsim
  ☆58Updated 2 weeks ago
• ftppz / ShanghaiTech-YSYX
  Unofficial guide for ysyx students applying to ShanghaiTech University
  ☆22Updated 8 months ago
• HIT-MaRiver-mips / cpucore-mariver
  ☆35Updated 2 years ago
• zencove-thu / zencove-zoom
  Highly configurable out-of-order MIPS32 processor, capable of booting Linux.
  ☆39Updated 2 years ago
• Tang-Haojin / YuQuan
  A RISC-V core running Debian (and a LoongArch core running Linux).
  ☆22Updated last week
• fluctlight001 / Generic-Cache-Module
  适用于龙芯杯团队赛入门选手的应急cache模块
  ☆30Updated last year
• FurryAcetylCoA / gtkwave-filter-process-RISC
  A tool to decode RISC-V and LoongArch and MIPS instructions in gtkwave
  ☆31Updated 6 months ago
• gmlayer0 / wired
  Linux-capable out-of-order superscaler multicore LoongArch32 (LA32 / LA32R) processor.
  ☆32Updated last year
• NSCSCC-2022-TJU / ChiselMIPS
  第六届龙芯杯混元形意太极门战队作品
  ☆18Updated 3 years ago
• meow-chip / MeowV64
  A superscalar RISC-V CPU with out-of-order execution and multi-core support
  ☆61Updated 3 years ago
• NoAXI / NoAXI-LoongArch-CPU
  Second Prize in NSCSCC 2024. Out-of-order CPU design from HDU. 2024年全国大学生计算机系统能力大赛CPU设计赛（龙芯杯）团队赛二等奖作品
  ☆20Updated last year
• YAVGroup / Verilog-OJ
  Online judge server for Verilog | verilogoj.ustc.edu.cn
  ☆82Updated last year
• OSCPU / ysyx-workbench
  ☆156Updated last week
• OpenXiangShan / difftest
  Modern co-simulation framework for RISC-V CPUs
  ☆159Updated last week
• huang-jl / LLCL-MIPS
  LLCL-MIPS is a superscalar MIPS processor, which supports MIPS Release 1 instructions and is capable of booting linux kernel. （第五届龙芯杯特等奖作…
  ☆37Updated 3 years ago
• NSCSCC-2020-Fudan / FDU1.1-NSCSCC
  复旦大学FDU1.1队在第四届“龙芯杯”的参赛作品
  ☆44Updated 5 years ago
• Superscalar-HIT-Core / Superscalar-HIT-Core-NSCSCC2020
  a Quad-issue, Out-of-order Superscalar MIPS Processor Implemented in SystemVerilog
  ☆49Updated last year
• arch-simulator-sig / advanced-computer-architecture
  体系结构研讨 + ysyx高阶大纲 (WIP
  ☆181Updated last year
• MrAMS / verilogModuleAddPrefix
  verilog module add prefix script 可用于ysyx项目添加学号
  ☆13Updated last year
• jiegec / kb
  My knowledge base
  ☆71Updated this week
• MaZirui2001 / Zircon
  ☆29Updated 9 months ago
• Clo91eaf / PUA-MIPS
  NSCSCC 2023 The Second Prize. TEAM PUA FROM HDU.
  ☆13Updated 6 months ago
• secure-v / vsh
  VSH（SHell for Visualizing vcd file）项目为数字波形文件命令行查看器。
  ☆24Updated 2 weeks ago
• isnthzy / lightsss-chiplab
  本项目已被合并至官方Chiplab中
  ☆12Updated 9 months ago
• OSCPU / ysyx
  一生一芯的信息发布和内容网站
  ☆135Updated last year