cyyself / CDIM-SoCLinks
SoC for CQU Dual Issue Machine
☆12Updated 2 years ago
Alternatives and similar repositories for CDIM-SoC
Users that are interested in CDIM-SoC are comparing it to the libraries listed below
Sorting:
- CQU Dual Issue Machine☆35Updated last year
- a Quad-issue, Out-of-order Superscalar MIPS Processor Implemented in SystemVerilog☆49Updated last year
- A Verilator based SoC simulator that allows you to define AXI Slave interface in software.☆49Updated 8 months ago
- nscscc2018☆26Updated 6 years ago
- 第六届龙芯杯混元形意太极门战队作品☆18Updated 3 years ago
- LLCL-MIPS is a superscalar MIPS processor, which supports MIPS Release 1 instructions and is capable of booting linux kernel. (第五届龙芯杯特等奖作…☆36Updated 3 years ago
- Uranus MIPS processor by MaxXing & USTB NSCSCC team☆38Updated 5 years ago
- A softcore microprocessor of MIPS32 architecture.☆40Updated last year
- USTC 并行程序设计实验☆8Updated 3 years ago
- Our repository for NSCSCC☆19Updated 5 months ago
- 重庆大学硬件综合设计课程实验文档☆39Updated last week
- A RISC-V core running Debian (and a LoongArch core running Linux).☆22Updated last year
- High performance LA32R out-of-order processor core. (NSCSCC 2023 Special Prize)☆81Updated last year
- Chongqing University 2020 NSCSCC☆28Updated 4 years ago
- The MIPS CPU from previous CQU NSCSCC team and debugged by me running uCore MIPS porting successfully☆9Updated 4 years ago
- NSCSCC 2020 - Yet Another MIPS Processor☆14Updated 3 years ago
- ☆35Updated 5 years ago
- 龙芯杯21个人赛作品☆35Updated 3 years ago
- Asymmetric dual issue in-order microprocessor.☆34Updated 5 years ago
- A Study of the SiFive Inclusive L2 Cache☆64Updated last year
- Computer System Project for Loongson FPGA Board in 2017☆52Updated 7 years ago
- A tool to decode RISC-V and LoongArch and MIPS instructions in gtkwave☆31Updated 3 months ago
- Highly configurable out-of-order MIPS32 processor, capable of booting Linux.☆39Updated 2 years ago
- 复旦大学FDU1.1队在第四届“龙芯杯”的参赛作品☆43Updated 4 years ago
- A simple full system emulator. Currently support RV64IMACSU and MIPS32 and LoongArch32. Capable of booting Linux. Suitable for education …☆117Updated 9 months ago
- "aura" my super-scalar O3 cpu core☆24Updated last year
- 第一届 RISC-V 中国峰会的幻灯片等资料存放☆38Updated 2 years ago
- A superscalar RISC-V CPU with out-of-order execution and multi-core support☆62Updated 3 years ago
- gem5 FS模式实验手册☆43Updated 2 years ago
- ☆16Updated 4 months ago