lamda-bbo / Open3DBenchLinks
Official implementation of paper "Open3DBench: Open-Source Benchmark for 3D-IC Backend Implementation and PPA Evaluation".
☆47Updated 2 months ago
Alternatives and similar repositories for Open3DBench
Users that are interested in Open3DBench are comparing it to the libraries listed below
Sorting:
- ☆22Updated last year
- Official implementation of DATE'25 paper "Timing-Driven Global Placement by Efficient Critical Path Extraction".☆50Updated 2 months ago
- MasterRTL: A Pre-Synthesis PPA Estimation Framework for Any RTL Design☆51Updated 3 months ago
- The first version of TritonPart☆28Updated last year
- Collection of digital hardware modules & projects (benchmarks)☆59Updated last month
- Xplace 3.0: An Extremely Fast, Extensible and Deterministic Placement Framework with Detailed-Routability and Timing Optimization☆135Updated 2 months ago
- ☆85Updated 2 months ago
- AutoCellLibX: Automated Standard Cell Library Extension Based on Pattern Mining☆15Updated 2 years ago
- AMF-Placer 2.0: An open-source timing-driven analytical mixed-size FPGA placer of heterogeneous resources (LUT/FF/LUTRAM/MUX/CARRY/DSP/BR…☆105Updated last year
- A Logic Synthesis tool based on "Mockturtle: EPFL Logic Synthesis Library " and "ABC: System for Sequential Logic Synthesis and Formal Ve…☆32Updated last month
- ☆53Updated 2 months ago
- 🕹 OpenPARF: An Open-Source Placement and Routing Framework for Large-Scale Heterogeneous FPGAs with Deep Learning Toolkit☆151Updated 4 months ago
- GPU-based logic synthesis tool☆90Updated 3 weeks ago
- ☆31Updated last year
- Artificial Netlist Generator☆40Updated last year
- A collection of ISCAS,ITC,TAU and other Benchmark Circuits for EDA tool evaluation.☆55Updated 7 months ago
- ☆34Updated 4 years ago
- Official open source repository for "A Timing Engine Inspired Graph Neural Network Model for Pre-Routing Slack Prediction" (DAC 2022)☆77Updated last year
- ☆46Updated last year
- OpenABC-D is a large-scale labeled dataset generated by synthesizing open source hardware IPs. This dataset can be used for various graph…☆130Updated last month
- An Open-Source Analytical Placer for Large Scale Heterogeneous FPGAs using Deep-Learning Toolkit☆84Updated 4 months ago
- ☆39Updated 2 years ago
- ☆23Updated 9 months ago
- ☆74Updated 2 months ago
- Analog IC symmetry extraction benchmark of AncstrGNN☆10Updated last year
- CUGR, VLSI Global Routing Tool Developed by CUHK☆137Updated 2 years ago
- Reimplementation of the VLSI placement algorithm: ePlace and ePlace-MS☆48Updated 9 months ago
- This is a python repo for flattening Verilog☆19Updated 3 months ago
- EPFL logic synthesis benchmarks☆208Updated last month
- ☆19Updated 2 years ago