Alternatives and similar repositories for SkyPlace

Users that are interested in SkyPlace are comparing it to the libraries listed below

• cuhk-eda / cu-gr-2
  ☆46Updated last year
• recurme / Mixed-Cell-Height_legalizer
  ☆11Updated last year
• cuhk-eda / Xplace
  Xplace 3.0: An Extremely Fast, Extensible and Deterministic Placement Framework with Detailed-Routability and Timing Optimization
  ☆135Updated 2 months ago
• geziangfinn / easyPlace
  Reimplementation of the VLSI placement algorithm: ePlace and ePlace-MS
  ☆48Updated 9 months ago
• cuhk-eda / cu-gr
  CUGR, VLSI Global Routing Tool Developed by CUHK
  ☆137Updated 2 years ago
• TimingPredict / TimingPredict
  Official open source repository for "A Timing Engine Inspired Graph Neural Network Model for Pre-Routing Slack Prediction" (DAC 2022)
  ☆77Updated last year
• bu-icsg / TAP-2.5D
  ☆34Updated 4 years ago
• EricLu1218 / Physical_Design_Automation
  2019 NTHU CS6135 (CS613500) VLSI Physical Design Automation Course Projects (include Two-way Min-cut Partitioning, Fixed-outline Slicing …
  ☆39Updated 3 months ago
• ABKGroup / PlacementEssentialReadings
  ☆57Updated 4 years ago
• TILOS-AI-Institute / HypergraphPartitioning
  Hypergraph Partitioning: benchmarks, evaluators, best known solutions and codes
  ☆70Updated 2 months ago
• daeyeon22 / artificial_netlist_generator
  Artificial Netlist Generator
  ☆40Updated last year
• ycchen218 / EDA-IRdrop-Prediction
  This is a deep-learning based model for Electronic Design Automation(EDA), predicting the IR drop location on the chip.
  ☆28Updated 2 years ago
• asyncvlsi / lefdef
  Mirror of the Si2 LEF/DEF parser (v5.8)
  ☆16Updated 3 years ago
• cuhk-eda / ripple
  Pin-Accessible Legalization for Mixed-Cell-Height Circuits
  ☆28Updated 3 years ago
• ABKGroup / MBFFClustering
  ☆12Updated last year
• lamda-bbo / Efficient-TDP
  Official implementation of DATE'25 paper "Timing-Driven Global Placement by Efficient Critical Path Extraction".
  ☆50Updated 2 months ago
• cuhk-eda / dr-cu
  Dr. CU, VLSI Detailed Routing Tool Developed by CUHK
  ☆137Updated 2 years ago
• ABKGroup / TritonPart
  The first version of TritonPart
  ☆28Updated last year
• The-OpenROAD-Project / RePlAce
  RePlAce global placement tool
  ☆237Updated 5 years ago
• RsynTeam / rsyn-x
  Rsyn – An Extensible Physical Synthesis Framework
  ☆129Updated last year
• zslwyuan / AMF-Placer
  AMF-Placer 2.0: An open-source timing-driven analytical mixed-size FPGA placer of heterogeneous resources (LUT/FF/LUTRAM/MUX/CARRY/DSP/BR…
  ☆105Updated last year
• PKU-IDEA / MacroRank
  Official implementation of MacroRank: Ranking Macro Placement Solutions Leveraging Translation Equivariancy (ASP-DAC 2023)
  ☆17Updated 2 years ago
• NVlabs / CircuitOps
  ☆90Updated 2 months ago
• ASU-VDA-Lab / 2024_ICCAD_Contest_Gate_Sizing_Benchmark
  ☆23Updated 9 months ago
• ycchen218 / EDA-Congestion-Prediction
  This is a deep-learning based model for Electronic Design Automation(EDA), predicting the congestion location.
  ☆21Updated last year
• VidyaChhabria / ThermEDGe-and-IREDGe
  Encoder-decoder based generative networks for static and transient thermal analysis
  ☆21Updated 2 years ago
• luckyrantanplan / nthu-route
  VLSI EDA Global Router
  ☆75Updated 7 years ago
• rachelselinar / DREAMPlaceFPGA
  An Open-Source Analytical Placer for Large Scale Heterogeneous FPGAs using Deep-Learning Toolkit
  ☆84Updated 3 months ago
• ABKGroup / TritonRoute-WXL
  ☆31Updated 4 years ago
• magical-eda / UT-AnLay
  Analog Placement Quality Prediction
  ☆24Updated 2 years ago