Alternatives and similar repositories for vast:

Users that are interested in vast are comparing it to the libraries listed below

• mikeurbach / egg-netlist-synthesizer
  Using e-graphs to synthesize netlists from boolean logic.
  ☆14Updated last year
• vegaluisjose / reticle
  ☆40Updated 3 years ago
• StanfordAHA / lassen
  The PE for the second generation CGRA (garnet).
  ☆17Updated 2 weeks ago
• apl-cornell / PDL
  A Hardware Pipeline Description Language
  ☆44Updated last year
• calyxir / calyx-riscv
  RISCV Core written in Calyx
  ☆15Updated 7 months ago
• chipsalliance / fpga-interchange-schema
  ☆55Updated 2 years ago
• StanfordAHA / lake
  Lake is a framework for generating synthesizable memory modules from a high-level behavioral specification and widely-available memory ma…
  ☆21Updated this week
• agurfinkel / btor2mlir
  BTOR2 MLIR project
  ☆25Updated last year
• Kuree / cgra_pnr
  Fast PnR toolchain for CGRA
  ☆18Updated 7 months ago
• djg / verilated-rs
  Verilator Porcelain
  ☆48Updated last year
• cucapra / latte21
  Languages, Tools, and Techniques for Accelerator Design
  ☆33Updated 3 years ago
• IntelLabs / pycaliper
  PyCaliper is Python-based tooling infrastructure that allows the verification and synthesis of specifications (properties) for RTL (e.g.,…
  ☆20Updated 2 months ago
• Coloquinte / quaigh
  Logic circuit analysis and optimization
  ☆33Updated 4 months ago
• CTSRD-CHERI / SIMTight
  Synthesisable SIMT-style RISC-V GPGPU
  ☆32Updated last month
• pku-liang / Cement
  The Next-gen Language & Compiler Powering Efficient Hardware Design
  ☆25Updated 2 months ago
• Kuree / hgdb
  Hardware generator debugger
  ☆73Updated last year
• iscas-tis / CHA
  ☆17Updated 8 months ago
• bespoke-silicon-group / bsg_bladerunner
  Meta-Repository for Bespoke Silicon Group's Manycore Architecture (A.K.A HammerBlade)
  ☆38Updated 3 months ago
• thoughtworks / hardposit-chisel3
  Chisel library for Unum Type-III Posit Arithmetic
  ☆36Updated 11 months ago
• cristian-mattarei / CoSA
  CoreIR Symbolic Analyzer
  ☆64Updated 4 years ago
• David-Durst / embeddedHaskellAetherling
  ☆25Updated 2 years ago
• SiliconSemantics / firrtlator
  firrtlator is a FIRRTL C++ library
  ☆21Updated 8 years ago
• masc-ucsc / fluid
  Fluid Pipelines
  ☆11Updated 6 years ago
• ekiwi / wellen
  wellen: waveform datastructures in Rust. Fast VCD, FST and GHW parsing for waveform viewers.
  ☆48Updated 2 weeks ago
• circt / arc-tests
  A collection of tests and benchmarks for the Arc simulation backend of CIRCT
  ☆27Updated last month
• jetafese / btor2mlir
  Bᴛᴏʀ2MLIR: A Format and Toolchain for Hardware Verification
  ☆13Updated 3 months ago
• StanfordAHA / doc
  Papers, Posters, Presentations, Documentation...
  ☆18Updated last year
• microsoft / Elastic-Silicon-Interconnect
  ESI is an FPGA connectivity system. It uses typed, latency-insensitive on-chip connections between ESI-enabled modules. It also bridges o…
  ☆34Updated 4 years ago