Verilog AST
☆21Dec 2, 2023Updated 2 years ago
Alternatives and similar repositories for vast
Users that are interested in vast are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- ☆40Sep 17, 2021Updated 4 years ago
- RISCV Core written in Calyx☆17Aug 16, 2024Updated last year
- Arithmetic multiplier benchmarks☆12Nov 13, 2017Updated 8 years ago
- generating hardware accelerators for pangenomic graph queries☆41Apr 7, 2026Updated last week
- An open source high level synthesis (HLS) tool built on top of LLVM☆129Jun 11, 2024Updated last year
- Wordpress hosting with auto-scaling - Free Trial • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- FPGA synthesis tool powered by program synthesis☆55Dec 15, 2025Updated 4 months ago
- Benchmarks, testbenches, and transformed codes for high-level synthesis research☆13Aug 18, 2017Updated 8 years ago
- Open-source AI acceleration on FPGA: from ONNX to RTL☆53Mar 24, 2026Updated 3 weeks ago
- Hop-Wise Graph Attention for Scalable and Generalizable Learning on Circuits☆35Aug 25, 2024Updated last year
- egraph <-> json☆17Dec 29, 2025Updated 3 months ago
- A hardware synthesis framework with multi-level paradigm☆44Jan 10, 2025Updated last year
- ☆14Mar 13, 2026Updated last month
- Hardware generator debugger☆77Feb 12, 2024Updated 2 years ago
- Easy SMT solver interaction☆34Feb 3, 2026Updated 2 months ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- High quality and composable RTL libraries in SystemVerilog☆32Apr 10, 2026Updated last week
- DHLS (Dynamic High-Level Synthesis) compiler based on MLIR☆178Updated this week
- A language for symbolic transitions system, inspired by Ivy.☆75Mar 19, 2026Updated 3 weeks ago
- AMulet 2. - A better AIG Multiplier Examination Tool☆28Dec 23, 2025Updated 3 months ago
- Intermediate Language (IL) for Hardware Accelerator Generators☆588Apr 11, 2026Updated last week
- ☆17Feb 3, 2023Updated 3 years ago
- Analyze experimental data with Programming by Navigation☆17Apr 10, 2026Updated last week
- QuteRTL: A RTL Front-End Towards Intelligent Synthesis and Verification☆16Nov 8, 2016Updated 9 years ago
- LLVM based HLS library for HWToolkit (hardware devel. toolkit)☆29Jan 21, 2026Updated 2 months ago
- Wordpress hosting with auto-scaling - Free Trial • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- Fluid Pipelines☆11May 4, 2018Updated 7 years ago
- Verilator Porcelain☆49Nov 7, 2023Updated 2 years ago
- A Hardware Pipeline Description Language☆60Jul 12, 2025Updated 9 months ago
- Rosetta: A Realistic High-level Synthesis Benchmark Suite for Software Programmable FPGAs (FPGA'18)☆170Nov 7, 2023Updated 2 years ago
- magma circuits☆265Oct 19, 2024Updated last year
- Collection of utlities for writing parsers. Includes a fast DIMACS CNF parser.☆15Nov 19, 2024Updated last year
- LEC - Logic Equivalence Checking - Formal Verification☆38Updated this week
- Using e-graphs for logic synthesis (ICCAD'25)☆33Apr 7, 2026Updated last week
- ☆16Jun 13, 2021Updated 4 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- A fork of Yosys that integrates the CellIFT pass☆13Updated this week
- GuidedSampler: Coverage-guided Sampling of SMT Solutions☆15Jul 9, 2025Updated 9 months ago
- Python version of tools to work with AIG formatted files☆12May 20, 2025Updated 10 months ago
- ☆87Mar 5, 2024Updated 2 years ago
- Agentic Benchmark for LLM-Crafted Heuristics in Combinatorial Optimization (ICLR'26)☆73Apr 10, 2026Updated last week
- Naive Educational RISC-V -- A simple single-stage RV32I processor☆28Nov 3, 2020Updated 5 years ago
- Verilog parsing and generator crate.☆21Apr 16, 2020Updated 6 years ago