ralbertazzi / bnnLinks
Training and Implementation of a CNN for image classification with binary weights and activations on FPGA with HLS tools
☆53Updated 7 years ago
Alternatives and similar repositories for bnn
Users that are interested in bnn are comparing it to the libraries listed below
Sorting:
- FPGA and GPU acceleration of LeNet5☆34Updated 6 years ago
- A generic Convolutional Neural Network (CNN) Accelerator (CNNA) for FPGA☆24Updated 3 years ago
- Convolutional Neural Network Using High Level Synthesis☆87Updated 4 years ago
- Quantized ResNet50 Dataflow Acceleration on Alveo, with PYNQ☆59Updated 3 years ago
- Example of Tiny YOLO deployed using Xilinx BNN-PYNQ.☆30Updated 6 years ago
- Some attempts to build CNN on PYNQ.☆24Updated 6 years ago
- FPGA-based neural network inference project for 2020 DAC System Design Contest☆113Updated 4 years ago
- The second place winner for DAC-SDC 2020☆97Updated 3 years ago
- FracBNN: Accurate and FPGA-Efficient Binary Neural Networks with Fractional Activations☆94Updated 3 years ago
- hls code zynq 7020 pynq z2 CNN☆83Updated 6 years ago
- A trained Convolutional Neural Network implemented on ZedBoard Zynq-7000 FPGA.☆96Updated last year
- Light-weighted neural network inference for object detection on small-scale FPGA board☆92Updated 6 years ago
- A DNN Accelerator implemented with RTL.☆67Updated 7 months ago
- CNN-Accelerator based on FPGA developed by verilog HDL.☆48Updated 5 years ago
- A VGG accelerator by System Verilog on DE1-SoC FPGA. Row Stationary (RS) dataflow is adopted, and computations are based on fixed point 1…☆34Updated 5 years ago
- FPGA-based ZynqNet CNN accelerator developed by Vivado_HLS☆112Updated 8 years ago
- Deep Learning Accelerator (Convolution Neural Networks)☆191Updated 7 years ago
- Deploy CNN accelerator in embedded OS using SDSOC and Xilinx Ultrascale+ ZCU102 platform.☆25Updated 7 years ago
- This is the first step to implement RNN on FPGAs. All modules are heavily commented. We will use High-Level Synthesis to turn these code …☆23Updated 6 years ago
- ☆33Updated 6 years ago
- PYNQ-Torch: a framework to develop PyTorch accelerators on the PYNQ platform☆72Updated 5 years ago
- PyTorch implementation of DiracDeltaNet from paper Synetgy: Algorithm-hardware Co-design for ConvNet Accelerators on Embedded FPGAs☆32Updated 6 years ago
- Vitis HLS Library for FINN☆206Updated 3 weeks ago
- A collection of tutorials for the fpgaConvNet framework.☆45Updated 11 months ago
- Quantized Training for Convolutional Neural Networks using Xilinx Brevitas☆12Updated 3 years ago
- Hardware implementation of Spiking Neural Network on a PYNQ-Z1 board☆37Updated 6 years ago
- 中文:☆101Updated 5 years ago
- FPGA accelerator and port of the emotion recognition CNN running in C on Xilinx ZYNQ☆21Updated 6 years ago
- An HLS based winograd systolic CNN accelerator☆53Updated 4 years ago
- This is a fully parameterized verilog implementation of computation kernels for accleration of the Inference of Convolutional Neural Netw…☆186Updated last year