Training and Implementation of a CNN for image classification with binary weights and activations on FPGA with HLS tools
☆53May 29, 2018Updated 8 years ago
Alternatives and similar repositories for bnn
Users that are interested in bnn are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- HLS code for a BNN accelerator☆17Sep 13, 2018Updated 7 years ago
- FPGA implementation of a handwritten digit recognition system based on k-nearest-neighbors (k-NN) classifier algorithm.☆21Apr 3, 2018Updated 8 years ago
- Hardware implementation of Spiking Neural Network on a PYNQ-Z1 board☆40Jun 14, 2019Updated 7 years ago
- The CNN based on the Xilinx Vivado HLS☆37Oct 27, 2021Updated 4 years ago
- Codes to implement MobileNet V2 in a FPGA☆32Dec 21, 2020Updated 5 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- An Synthesizable Deep Learning Library based on Xilinx High Level Synthesis(HLS) tool☆16Feb 20, 2017Updated 9 years ago
- This project implements a convolution kernel based on vivado HLS on zcu104☆36Mar 15, 2020Updated 6 years ago
- Convolutional Neural Network Using High Level Synthesis☆89Sep 23, 2020Updated 5 years ago
- Binarized Convolutional Neural Networks on Software-Programmable FPGAs (FPGA'17)☆315Nov 16, 2020Updated 5 years ago
- This repository contains all the parameters you need to synthesize the AlexNet by using Vivado High Level Synthesis.☆21Mar 5, 2018Updated 8 years ago
- FPGA-based neural network inference project for 2020 DAC System Design Contest☆118Feb 22, 2021Updated 5 years ago
- FPGA Accelerator for CNN using Vivado HLS☆340Oct 25, 2021Updated 4 years ago
- Lenet for MNIST handwritten digit recognition using Vivado hls tool☆38Jul 22, 2020Updated 6 years ago
- FracBNN: Accurate and FPGA-Efficient Binary Neural Networks with Fractional Activations☆99Oct 2, 2021Updated 4 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- c++ version of ViT☆12Nov 13, 2022Updated 3 years ago
- Systolic Three Matrix Multiplier for Graph Convolutional Networks using High Level Synthesis☆24Jul 29, 2022Updated 3 years ago
- ☆10Jan 15, 2023Updated 3 years ago
- FPGA-based ZynqNet CNN accelerator developed by Vivado_HLS☆116Jun 24, 2017Updated 9 years ago
- Embedded facial recognition system involving PYNQ board, Webcam, and HDMI output.☆11May 10, 2018Updated 8 years ago
- ☆11Sep 3, 2022Updated 3 years ago
- How to Accelerate an Image Upscaling CNN on FPGA Using HLS☆29Oct 6, 2021Updated 4 years ago
- 可运行☆40Jul 1, 2022Updated 4 years ago
- CNN simd based accelerator using Vitis HLS☆11Jul 15, 2022Updated 4 years ago
- End-to-end encrypted cloud storage - Proton Drive • AdSpecial offer: 40% Off Yearly / 80% Off First Month. Protect your most important files, photos, and documents from prying eyes.
- ☆12Feb 23, 2022Updated 4 years ago
- IMAGE PROCESSING ON XILINX PYNQ Z2 (CANNY, SOBEL)☆27Jan 17, 2022Updated 4 years ago
- (Not actively updating)Vision Transformer Accelerator implemented in Vivado HLS for Xilinx FPGAs.☆25Dec 29, 2024Updated last year
- Vivado HLS study notes, courses, documents.☆12Dec 7, 2019Updated 6 years ago
- ☆14Dec 10, 2022Updated 3 years ago
- A DNN Accelerator implemented with RTL.☆71Jan 9, 2025Updated last year
- ☆19Dec 19, 2018Updated 7 years ago
- MTCNN with convolution reprogramed in c☆14Jul 25, 2019Updated 7 years ago
- The community version of HLS_BLSTM (A BLSTM FPGA accelerator of an OCR appilcation, using CAPI/SNAP))☆11Sep 27, 2019Updated 6 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- hls code zynq 7020 pynq z2 CNN☆92Mar 15, 2019Updated 7 years ago
- This is the first step to implement RNN on FPGAs. All modules are heavily commented. We will use High-Level Synthesis to turn these code …☆25Jun 28, 2019Updated 7 years ago
- RTL implementation of TFlite FPGA accelerator and RISC-V controller. 3D Object Detection based on LiDAR Point Clouds.☆17Jun 24, 2026Updated last month
- A repository of my Xilinx Open Hardware 2020 submission including a demo of support vector machines on PYNQ, C++ source code and projects…☆16Jun 27, 2020Updated 6 years ago
- ESP32-NOW with Wifi☆23Apr 11, 2025Updated last year
- The CyNAPSE Neuromorphic Accelerator: A Digital Spiking neural network accelerator written in fully synthesizable verilog HDL☆38Sep 25, 2019Updated 6 years ago
- ☆14Jun 22, 2022Updated 4 years ago