Alternatives and similar repositories for Handwritten_Mathematical_Calculator_on_FPGA

Users that are interested in Handwritten_Mathematical_Calculator_on_FPGA are comparing it to the libraries listed below

• FloyedShen / mnist_hls
  Lenet for MNIST handwritten digit recognition using Vivado hls tool
  ☆37Updated 4 years ago
• yztong / LeNet_RTL
  An LeNet RTL implement onto FPGA
  ☆48Updated 7 years ago
• eda-lab / CNNAF-CNN-Accelerator_init
  CNN-Accelerator based on FPGA developed by verilog HDL.
  ☆48Updated 5 years ago
• canteen-man / CNN_FPGA_ZYNQ_PYNQ
  hls code zynq 7020 pynq z2 CNN
  ☆85Updated 6 years ago
• mayshin10 / CNN-Accelerator
  Designing CNN accelerator using a Xilinx FPGA board and comparing performance with CPU.
  ☆22Updated 4 years ago
• JinChen-tw / pynqz2_dpu140
  This TRD is implement DPU v1.4.0 on PYNQ-Z2 board
  ☆44Updated 4 years ago
• mfarhadi / CNNIOT
  ☆45Updated 6 years ago
• user-xleo / DNN-Accelerator
  A DNN Accelerator implemented with RTL.
  ☆63Updated 4 months ago
• zhan6841 / FPGA-Accelerator-for-AES-LeNet-VGG16
  FPGA/AES/LeNet/VGG16
  ☆103Updated 6 years ago
• hisrg / PYNQ_CNN_Accelerator_Tutorial
  中文：
  ☆98Updated 5 years ago
• amiq-consulting / CNN-using-HLS
  Convolutional Neural Network Using High Level Synthesis
  ☆87Updated 4 years ago
• 9334swjtu / PYNQ_softmax
  achieve softmax in PYNQ with heterogeneous computing.
  ☆63Updated 6 years ago
• ZhaoqxCN / PYNQ-CNN-ATTEMPT
  Some attempts to build CNN on PYNQ.
  ☆24Updated 5 years ago
• zhongguanggong / ggz
  使用FPGA实现CNN模型
  ☆15Updated 5 years ago
• arasi15 / CNN-Accelerator-Implementation-based-on-Eyerissv2
  ☆110Updated 4 years ago
• Alioth2000 / PYNQ-Z2-traffic-signs-recognition
  搭建卷积神经网络并利用FPGA加速实现交通标志识别
  ☆27Updated 4 years ago
• matsuda-slab / YOLO_ZYNQ_MASTER
  Implementation of YOLOv3-tiny + Depthwise Separable Convolution on FPGA
  ☆28Updated 3 years ago
• clancylea / pynq-sobel
  A demo for accelerating sobel in xilinx's fpga pynq
  ☆19Updated 2 years ago
• peilin-chen / hls_for_cnn_mnist
  【入门项目】这个仓库是用hls来实现手写数字识别CNN硬件(xilinx fpga)加速的代码
  ☆76Updated 2 years ago
• djtfoo / lenet5-verilog
  A Verilog design of LeNet-5, a Convolutional Neural Network architecture
  ☆31Updated 4 years ago
• karthisugumar / CSE240D-Hierarchical_Mesh_NoC-Eyeriss_v2
  A SystemVerilog implementation of Row-Stationary dataflow and Hierarchical Mesh Network-on-Chip Architecture based on Eyeriss CNN Acceler…
  ☆159Updated 5 years ago
• boaaaang / CNN-Implementation-in-Verilog
  Convolutional Neural Network RTL-level Design
  ☆51Updated 3 years ago
• XueTianyu24 / cnn_accelerator
  【入门项目】基于PYNQ-Z2实现手写数字识别卷积神经网络硬件加速器
  ☆148Updated 2 years ago
• Zero0Hero / yolo_e203_fpga
  Nuclei E203 with yolo accelerator based on xc7k325
  ☆14Updated 9 months ago
• GeneralZDS / FPGA-DCNN-Accelerator
  基于HLS的高效深度卷积神经网络FPGA实现方法
  ☆69Updated 5 years ago
• sherylll / lenet5-accelerator
  FPGA and GPU acceleration of LeNet5
  ☆35Updated 5 years ago
• sumanth-kalluri / cnn_hardware_acclerator_for_fpga
  This is a fully parameterized verilog implementation of computation kernels for accleration of the Inference of Convolutional Neural Netw…
  ☆177Updated last year
• Xinyang-ZHANG / MNIST
  MNIST using tensorflow, c++ and fpga (zynq7010)
  ☆26Updated 2 years ago
• xbdxwyh / yolov3_fpga_project
  ☆52Updated 2 years ago
• MasLiang / CNN-On-FPGA
  FPGA
  ☆154Updated 10 months ago