How to Accelerate an Image Upscaling CNN on FPGA Using HLS
☆28Oct 6, 2021Updated 4 years ago
Alternatives and similar repositories for image-upscaling-CNN
Users that are interested in image-upscaling-CNN are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- This repository contains lectures designed for an introduction to RISC-v and it's capabilities.☆10Sep 19, 2025Updated 6 months ago
- Convolutional Neural Network Using High Level Synthesis☆90Sep 23, 2020Updated 5 years ago
- A CNN-based hardware digit/image recognition module designed on PyTorch and then implemented with Verilog on FPGA☆21Oct 17, 2022Updated 3 years ago
- Accelerated Image Reconstruction using Generative Adversarial Networks on Cloud FPGAs☆11Aug 27, 2021Updated 4 years ago
- Motion detection in both software and in hardware-accelerated OpenCV☆15Dec 26, 2016Updated 9 years ago
- Serverless GPU API endpoints on Runpod - Bonus Credits • AdSkip the infrastructure headaches. Auto-scaling, pay-as-you-go, no-ops approach lets you focus on innovating your application.
- The CNN based on the Xilinx Vivado HLS☆37Oct 27, 2021Updated 4 years ago
- Systolic Three Matrix Multiplier for Graph Convolutional Networks using High Level Synthesis☆23Jul 29, 2022Updated 3 years ago
- Training and Implementation of a CNN for image classification with binary weights and activations on FPGA with HLS tools☆53May 29, 2018Updated 7 years ago
- Python/Simulator integration using procedure calls☆10Mar 12, 2020Updated 6 years ago
- This repository contains an example of the connection between an UVM Testbench and a Python reference model.☆12Nov 6, 2019Updated 6 years ago
- ☆18Sep 2, 2020Updated 5 years ago
- A basic documentation generator for Verilog, similar to Doxygen.☆13Aug 5, 2016Updated 9 years ago
- Small projects intended to run on the Digilent Zybo development board, utilizing PetaLinux on the Zynq's ARM processor.☆23Aug 19, 2016Updated 9 years ago
- A Convolutional Neural Network Accelerator, which increases the process of convolution calculation. Based on Xilinx HLS design suite.☆12Jul 29, 2021Updated 4 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Backup: Library implementing a C TLM-2 style to bridge C models to SystemC TLM-2.0 (C++) from GreenSocs (https://git.greensocs.com/tlm/tl…☆19Aug 13, 2018Updated 7 years ago
- Provides automation scripts for building BFMs☆16Apr 19, 2025Updated 11 months ago
- A simple demo to implement the Handwritten Mathematical Calculator on PYNQ-Z2 FPGA platform by using HLS.☆41Aug 11, 2020Updated 5 years ago
- This project implements a convolution kernel based on vivado HLS on zcu104☆36Mar 15, 2020Updated 6 years ago
- The Go programming language☆15Aug 27, 2018Updated 7 years ago
- High Level Synthesis of a trained Convolutional Neural Network for handwritten digit recongnition.☆42Jul 25, 2024Updated last year
- A library for generating Software Defined Radio-intended DSP code for FPGAs that makes use of the MyHDL (www.myhdl.org) Python library. T…☆25Aug 29, 2012Updated 13 years ago
- This is our Compiler Design project for 6th semester.☆12May 15, 2022Updated 3 years ago
- Neural Turing Machine for a Multi-Processor System on Chip verified with UVM/OSVVM/FV☆12Updated this week
- Wordpress hosting with auto-scaling - Free Trial • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- hls code zynq 7020 pynq z2 CNN☆91Mar 15, 2019Updated 7 years ago
- Examples shown as part of the tutorial "Productive parallel programming on FPGA with high-level synthesis".☆205Nov 14, 2021Updated 4 years ago
- Library defining all Ethernet packets in SystemVerilog and in SystemC☆39Aug 26, 2016Updated 9 years ago
- ☆13Jan 28, 2026Updated 2 months ago
- IP-core package generator for AXI4/Avalon☆23Nov 25, 2018Updated 7 years ago
- Human Protein Atlas image classification competition☆13May 22, 2023Updated 2 years ago
- Constrained RAndom Verification Enviroment (CRAVE)☆19Nov 23, 2023Updated 2 years ago
- A simple dot file / graph generator for Verilog syntax trees.☆23Jul 16, 2016Updated 9 years ago
- A design of 15-order FIR filter using Verilog, with modulation and demodulation system using MATLAB☆10Aug 15, 2020Updated 5 years ago
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- Code for Disambiguating Monocular Depth Estimation with a Single Transient☆12Sep 8, 2020Updated 5 years ago
- Constrained random stimuli generation for C++ and SystemC☆53Nov 29, 2023Updated 2 years ago
- ☆12Jan 19, 2019Updated 7 years ago
- A python library for ngspice☆14Jun 21, 2022Updated 3 years ago
- Example of Test Driven Design with VUnit☆16Nov 22, 2021Updated 4 years ago
- CNN simd based accelerator using Vitis HLS☆11Jul 15, 2022Updated 3 years ago
- 模型量化工程 Base pretrained models and datasets in pytorch (MNIST, SVHN, CIFAR10, CIFAR100, STL10, AlexNet, VGG16, VGG19, ResNet, Inception,…☆12Aug 3, 2018Updated 7 years ago