KestrelComputer / S64X7

Related projects ⓘ

Alternatives and complementary repositories for S64X7

• stacksmith / fpgasm
  FPGA assembler! Create bare-metal FPGA designs without Verilog or VHDL (Not to self: use Lisp next time)
  ☆53Updated 3 years ago
• terpstra / opa
  Open Processor Architecture
  ☆26Updated 8 years ago
• pepijndevos / seqpu
  A bit-serial CPU
  ☆18Updated 5 years ago
• haojunliu / OpenFPGA
  OpenFPGA
  ☆33Updated 6 years ago
• KestrelComputer / polaris
  RISC-V RV64IS-compatible processor for the Kestrel-3
  ☆21Updated last year
• veripool / dinotrace
  Simulation VCD waveform viewer, using old Motif UI
  ☆25Updated last year
• OpenCAPI / omi_device_ice
  An example OMI Device FPGA with 2 DDR4 memory ports
  ☆15Updated last year
• mrisc32 / mrisc32-a1
  A pipelined, in-order, scalar VHDL implementation of the MRISC32 ISA
  ☆22Updated last year
• hamsternz / emulate-risc-v
  A very simple RISC-V ISA emulator.
  ☆35Updated 3 years ago
• YosysHQ / abc
  ABC: System for Sequential Logic Synthesis and Formal Verification
  ☆27Updated 2 weeks ago
• zylin / zpugcc
  ☆50Updated 7 years ago
• lzw545 / opengg
  OpenGL-like graphics pipeline on a Xilinx FPGA
  ☆30Updated 13 years ago
• m-labs / microscope
  Finding the bacteria in rotting FPGA designs.
  ☆13Updated 3 years ago
• drom / quark
  Stack CPU Work In Progress
  ☆30Updated 10 months ago
• RTimothyEdwards / irsim
  IRSIM switch-level simulator for digital circuits
  ☆30Updated 6 months ago
• knielsen / ice40_viewer
  ☆58Updated last year
• YosysHQ / yosys-plugins
  Yosys Plugins
  ☆20Updated 5 years ago
• jamesbowman / sincos
  Efficient implementations of the transcendental functions
  ☆25Updated 7 years ago
• tinyfpga / TinyFPGA-SoC
  Opensource building blocks for TinyFPGA microcontrollers and retro computers.
  ☆17Updated 7 years ago
• aniketnk / circular-queue-verilog
  Implementation of a circular queue in hardware using verilog.
  ☆16Updated 5 years ago
• tommythorn / yari
  YARI is a high performance open source FPGA soft-core RISC implementation, binary compatible with MIPS I. The distribution package includ…
  ☆44Updated 5 years ago
• cseed / cynth
  a simple C-to-Verilog compiler
  ☆47Updated 7 years ago
• mballance / fwrisc-s
  ☆10Updated 5 years ago
• ZipCPU / zbasic
  A bare bones, basic, ZipCPU system designed for both testing and quick integration into new systems
  ☆43Updated 2 years ago
• AngelTerrones / Algol
  A RISC-V CPU (Outdated: using priviledge v1.7)
  ☆25Updated 5 years ago
• lawrie / ulx3s_examples
  Example Verilog code for Ulx3s
  ☆40Updated 2 years ago
• YosysHQ / VlogHammer
  A Verilog Synthesis Regression Test
  ☆34Updated 8 months ago
• ZipCPU / zipversa
  A Versa Board implementation using the AutoFPGA/ZipCPU infrastructure
  ☆13Updated 5 years ago
• jbush001 / MiteCPU
  Minimal microprocessor
  ☆19Updated 7 years ago