64-bit MISC Architecture CPU
☆13Dec 13, 2016Updated 9 years ago
Alternatives and similar repositories for S64X7
Users that are interested in S64X7 are comparing it to the libraries listed below
Sorting:
- This project has files needed to design and characterise flipflop☆21Jun 3, 2019Updated 6 years ago
- RISC-V RV64IS-compatible processor for the Kestrel-3☆21Feb 24, 2023Updated 3 years ago
- ELVE : ELVE Logic Visualization Engine☆11Jul 2, 2017Updated 8 years ago
- AltOr32 - Alternative Lightweight OpenRisc CPU☆13Dec 17, 2015Updated 10 years ago
- ☆10Nov 8, 2019Updated 6 years ago
- embr's toy for playing with smartcards☆13Jul 31, 2024Updated last year
- SEGA Genesis/Megadrive FPGA core☆13Nov 28, 2018Updated 7 years ago
- OpenFPGA☆34Mar 12, 2018Updated 7 years ago
- openMSP430 CPU core (from OpenCores)☆22Oct 14, 2022Updated 3 years ago
- Intermediate Representation Of Hardware Abstraction (LLVM-ish for HLS)☆35Jul 9, 2021Updated 4 years ago
- Library to program with streams, events, and to queue own functions into a stream.☆15Jan 23, 2026Updated last month
- Various interface addon boards and expansions for the Glasgow Digital Interface Explorer☆18Oct 24, 2023Updated 2 years ago
- The Kestrel is a family of home-made computers, built as much as possible on open-source technology, and supporting as much as possible t…☆189Feb 9, 2021Updated 5 years ago
- A RISC-V CPU (Outdated: using priviledge v1.7)☆26Apr 6, 2019Updated 6 years ago
- Easy cross-compilation of compiler-rt for bare metal ARM targets☆22Sep 11, 2016Updated 9 years ago
- Free open source EDA tools☆66Oct 1, 2019Updated 6 years ago
- ESI is an FPGA connectivity system. It uses typed, latency-insensitive on-chip connections between ESI-enabled modules. It also bridges o…☆35Sep 30, 2020Updated 5 years ago
- BSG Replicant: Cosimulation and Emulation Infrastructure for HammerBlade☆37Feb 20, 2026Updated last week
- DTMF Receiver: Logic Synthesis and Physical Design using genus and innovus in 90nm process node☆14Dec 1, 2023Updated 2 years ago
- CSL styles bundled with Zotero client☆12Jan 26, 2026Updated last month
- Ardumoto Motor Driver Shield for Arduino, created by and available from SparkFun Electronics☆10Aug 13, 2019Updated 6 years ago
- David M. Gay's floating-point conversion library☆37Jun 10, 2010Updated 15 years ago
- The No-Order File System (NoFS)☆49Oct 23, 2012Updated 13 years ago
- Real Hardware VGM Playback Platform - Please submit PRs/issues at https://git.agiri.ninja/natalie/megagrrl☆37Jun 16, 2025Updated 8 months ago
- Icestudio collection with the blocks of the FPGA Jedi hardware Academy☆40Jun 28, 2024Updated last year
- Parallel Array of Simple Cores. Multicore processor.☆100May 16, 2019Updated 6 years ago
- ODIN console files, for remote control of PowerSDR☆13Aug 11, 2021Updated 4 years ago
- Libraries for working with file formats in Nintendo DS games☆12Nov 20, 2022Updated 3 years ago
- AVR CPU Core Implementation in Verilog HDL.☆14Oct 28, 2018Updated 7 years ago
- woovebox resources and patches☆15Jan 24, 2025Updated last year
- Python program that uses the BG7 network analyser☆11Sep 30, 2023Updated 2 years ago
- Gandr is a cross-platform bootloader project, intended to fill in the gap of a utopic bootloader.☆20Aug 13, 2015Updated 10 years ago
- ☆10Feb 3, 2026Updated 3 weeks ago
- RTL implementation for Advanced Encryption Standard (AES) in Verilog. Synthesis Done in Synopsys DC.☆10Dec 11, 2020Updated 5 years ago
- Use a Nintendo Switch Joy-Con (L) for Clip Studio Paint hotkeys☆10May 28, 2024Updated last year
- Public repository of the UCSC CMPE220 class project☆10Oct 8, 2017Updated 8 years ago
- ☆12Feb 28, 2022Updated 4 years ago
- Synthesis using Synopsys DC and Physical Design flow using Synopsys ICC II, of my RISC-V 5 stage pipelined using 32 nm tech repo☆14Jul 31, 2024Updated last year
- Airfoil Library created with Xoptfoil2☆11Jan 10, 2026Updated last month