ben-marshall / croyde-riscv
A barebones 64-bit RISC-V micro-controller class CPU, implementing the I(nteger), M(ul/div), C(ompressed) and K(ryptography) extensions.
☆44Updated 3 years ago
Alternatives and similar repositories for croyde-riscv:
Users that are interested in croyde-riscv are comparing it to the libraries listed below
- DUTH RISC-V Superscalar Microprocessor☆30Updated 5 months ago
- Platform Level Interrupt Controller☆37Updated 10 months ago
- General Purpose AXI Direct Memory Access☆49Updated 10 months ago
- ☆26Updated 4 years ago
- Xilinx AXI VIP example of use☆34Updated 3 years ago
- SystemVerilog Direct Programming Interface (DPI) Tutorial☆53Updated 4 years ago
- RTL sources of the High-Performance L1 Dcache (HPDcache) for OpenHW CV cores☆68Updated last week
- Simple single-port AXI memory interface☆39Updated 9 months ago
- An open source, parameterized SystemVerilog digital hardware IP library☆26Updated 9 months ago
- Contains commonly used UVM components (agents, environments and tests).☆28Updated 6 years ago
- CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform☆19Updated last month
- The memory model was leveraged from micron.☆22Updated 7 years ago
- IEEE 754 single and double precision floating point library in systemverilog and vhdl☆62Updated 3 months ago
- Prototype-network-on-chip (ProNoC) is an EDA tool that facilitates prototyping of custom heterogeneous NoC-based many-core-SoC (MCSoC).☆52Updated last week
- The controller is a Verilog implementation through a state machine structure per Micro datasheet specifications, and connected to a prede…☆21Updated 6 years ago
- ☆53Updated 4 years ago
- SystemVerilog Functional Coverage for RISC-V ISA☆25Updated 5 months ago
- 256-bit vector processor based on the RISC-V vector (V) extension☆28Updated 3 years ago
- SpinalHDL based, FPGA Suitable RTL Implementation of RISC-V RV32. Aligned with RISC-V Virtual Prototype☆45Updated 5 months ago
- LEN5 is a configurable, speculative, out-of-order, 64-bit RISC-V microprocessor targetting etherogeneus systems on chip.☆15Updated 10 months ago
- Advanced Architecture Labs with CVA6☆54Updated last year
- SystemVerilog modules and classes commonly used for verification☆46Updated 2 months ago
- SoC Based on ARM Cortex-M3☆28Updated last week
- BlackParrot on Zynq☆33Updated 2 weeks ago
- LCAI-TIHU HW is an AI inference processor which is comprised of RISC-V cpu, nvdla, NoC bus, PCIe module, DDR, SRAM, bootROM, DMA and peri…☆36Updated 2 years ago
- Modular SRAM-based 2D hierarchical-search Binary Content Addressable Memory (2D-BCAM)☆19Updated 4 months ago
- ☆36Updated last year
- YosysHQ SVA AXI Properties☆37Updated 2 years ago
- Multi-Processor System on Chip verified with UVM/OSVVM/FV☆28Updated last month
- ☆88Updated last year