Matrix Multiply and Accumulate unit written in System Verilog
☆15Feb 7, 2019Updated 7 years ago
Alternatives and similar repositories for Matrix-MAC-Unit
Users that are interested in Matrix-MAC-Unit are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- A configurable general purpose graphics processing unit for☆12May 18, 2019Updated 7 years ago
- Common SystemVerilog RTL modules for RgGen☆16Feb 5, 2026Updated 6 months ago
- Low level arithmetic primitives in RTL☆25Apr 3, 2020Updated 6 years ago
- Converting systemverilog to verilog.☆10Feb 15, 2018Updated 8 years ago
- Superscalar Out-of-Order NPU Design on FPGA☆16May 17, 2024Updated 2 years ago
- Open source password manager - Proton Pass • AdSecurely store, share, and autofill your credentials with Proton Pass, the end-to-end encrypted password manager trusted by millions.
- A risc v based architecture to develop a core/ processor which is capable of Matrix MAC Operations☆13May 31, 2026Updated 3 months ago
- UltraZed Edition examples☆12Oct 29, 2017Updated 8 years ago
- Integration test for entire CGRA flow☆12Jan 17, 2020Updated 6 years ago
- RISC-V Rocket Chip Strap-on-Booster with Fused Universal Neural Network (FuNN) eNNgine☆21Mar 17, 2022Updated 4 years ago
- ☆21Updated this week
- Open NPU is an open-source project dedicated to creating a flexible, extensible, and high-performance neural processing unit (NPU) archit…☆23Jun 20, 2024Updated 2 years ago
- Transactional Verilog design and Verilator Testbench for a RISC-V TensorCore Vector co-processor for reproducible linear algebra☆67Dec 19, 2021Updated 4 years ago
- Deep Reinforcement Learning with CartPole in Pytorch☆15Jun 13, 2020Updated 6 years ago
- ☆15Aug 10, 2026Updated 3 weeks ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Soft-microcontroller implementation of an ARM Cortex-M0☆31Apr 23, 2019Updated 7 years ago
- Reusable image processing modules in SystemVerilog☆33Aug 7, 2017Updated 9 years ago
- A tiniest ASIC GPU that can render only two texture mapped triangles☆30Jan 2, 2026Updated 8 months ago
- Sensor Fusion Library for ST sensors and microcontrollers☆12Aug 8, 2022Updated 4 years ago
- ☆82Feb 7, 2025Updated last year
- RV32I Single Cycle Processor (CPU)☆12Nov 14, 2021Updated 4 years ago
- Collection of configuration files☆17Jan 29, 2020Updated 6 years ago
- openarmx_vla is a LeRobot-compatible package that enables the OpenArmX robot to run Vision-Language-Action (VLA) models such as Pi0.5, Pi…☆17Jul 27, 2026Updated last month
- An automatic place-and-route tool for Minecraft redstone circuits☆26Apr 1, 2016Updated 10 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- Matrix Accelerator Generator for GeMM Operations based on SIGMA Architecture in CHISEL HDL☆15Mar 21, 2024Updated 2 years ago
- umbrella project helps you to build up onnc from scratch☆24Mar 14, 2022Updated 4 years ago
- RL-Pruner: Structured Pruning Using Reinforcement Learning for CNN Compression and Acceleration☆29Jun 8, 2025Updated last year
- A series of simulations organized as homework assignments that were part of the course on Neuromorphic Engineering at IIT Bombay (course …☆10Jul 19, 2016Updated 10 years ago
- ☆19Dec 20, 2023Updated 2 years ago
- ☆35Mar 1, 2019Updated 7 years ago
- 9 track standard cells for GF180MCU provided by GlobalFoundries.☆19Dec 5, 2022Updated 3 years ago
- ☆10Nov 8, 2019Updated 6 years ago
- EC499: Major Project☆11Jun 25, 2023Updated 3 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- System verilog register model for uvm testbenches.☆21Aug 29, 2018Updated 8 years ago
- In this project, the simulation of simple digital hearing aid was developed using MATLAB programming language. The implementation of this…☆10Nov 11, 2021Updated 4 years ago
- Software and Hardware models of Approximate Carry-Lookahead Adder with Intelligent Carry Judgement and Correction☆12Apr 21, 2022Updated 4 years ago
- ☆13Apr 27, 2024Updated 2 years ago
- A barebones 64-bit RISC-V micro-controller class CPU, implementing the I(nteger), M(ul/div), C(ompressed) and K(ryptography) extensions.☆52Jan 31, 2022Updated 4 years ago
- IC implementation of TPU☆160Dec 18, 2019Updated 6 years ago
- This repository contains simulation files and other relevant files on the On-chip clock multiplier (PLL) (Fclkin—5MHz to 12MHz, Fclkout—4…☆15Oct 18, 2021Updated 4 years ago