Nic30 / hwtHlsView external linksLinks
LLVM based HLS library for HWToolkit (hardware devel. toolkit)
☆27Jan 21, 2026Updated 3 weeks ago
Alternatives and similar repositories for hwtHls
Users that are interested in hwtHls are comparing it to the libraries listed below
Sorting:
- The PE for the second generation CGRA (garnet).☆18Apr 25, 2025Updated 9 months ago
- Fast PnR toolchain for CGRA☆18Jul 26, 2024Updated last year
- VHDL/Verilog/SystemC code generator, simulator API written in python/c++☆220Dec 23, 2025Updated last month
- mantle library☆44Dec 20, 2022Updated 3 years ago
- Python library of AST nodes for SystemVerilog/VHDL, code generator, transpiler and translator☆41Nov 12, 2025Updated 3 months ago
- Synthesiser for Asynchronous Verilog Language☆20Oct 29, 2014Updated 11 years ago
- A Coq framework to support structural design and proof of hardware cache-coherence protocols☆14May 7, 2022Updated 3 years ago
- The ANUBIS benchmark suite for Incremental Synthesis☆12Dec 15, 2020Updated 5 years ago
- Repository containing the DSP gateware cores☆14Feb 6, 2026Updated last week
- A stream to RTL compiler based on MLIR and CIRCT☆16Nov 15, 2022Updated 3 years ago
- A Python package for testing hardware (part of the magma ecosystem)☆47Mar 11, 2024Updated last year
- ILA Model Database☆24Sep 27, 2020Updated 5 years ago
- Provides a packaged collection of open source EDA tools☆12Apr 14, 2019Updated 6 years ago
- CMurphi mirror: http://mclab.di.uniroma1.it/site/index.php/software/18-cmurphi☆12Jan 22, 2016Updated 10 years ago
- A collection of core generators to use with FuseSoC☆17Aug 23, 2024Updated last year
- Benchmarks, testbenches, and transformed codes for high-level synthesis research☆13Aug 18, 2017Updated 8 years ago
- Python version of tools to work with AIG formatted files☆12May 20, 2025Updated 8 months ago
- Import and export IP-XACT XML register models☆37Nov 5, 2025Updated 3 months ago
- Debuggable hardware generator☆71Feb 17, 2023Updated 2 years ago
- OpenFPGA☆34Mar 12, 2018Updated 7 years ago
- A Tcl-Library for scripted HDL generation☆17Apr 30, 2024Updated last year
- Nirah is a project aimed at automatically wrapping verilator C++ models in python in order for high level, extendable control and verific…☆12Mar 6, 2019Updated 6 years ago
- Fast Verilog/VHDL parser preprocessor and code generator for C++/Python based on ANTLR4☆313Jun 30, 2025Updated 7 months ago
- netlistDB - Intermediate format for digital hardware representation with graph database API☆31Mar 17, 2021Updated 4 years ago
- Is a collection of NULL Convention Logic (NCL) circuits and libraries written in Verilog to provide the experience of logically determine…☆15Jun 15, 2016Updated 9 years ago
- Java library for parsing and manipulating graph representations of gate-level Verilog netlists☆15Jan 9, 2017Updated 9 years ago
- Hardware Formal Verification☆17Aug 10, 2020Updated 5 years ago
- CoreIR Symbolic Analyzer☆74Oct 27, 2020Updated 5 years ago
- Verilog generation tool written in Rust☆62Jun 29, 2023Updated 2 years ago
- Formal semantics of BSV (Bluespec SystemVerilog), given as a Haskell Program and accompanying document☆18Jul 17, 2016Updated 9 years ago
- Cross platform Instant Outbidding Bot, Instant Outbidder Bot is designed to outbid all real-time bids within a second by percentage incre…☆100Jan 17, 2023Updated 3 years ago
- OpenDesign Flow Database☆17Oct 31, 2018Updated 7 years ago
- This repository contains an example of the connection between an UVM Testbench and a Python reference model using UVM Connect from Mentor…☆17Feb 21, 2020Updated 5 years ago
- Verilog parsing and generator crate.☆21Apr 16, 2020Updated 5 years ago
- FPGA Development toolset☆20Jun 15, 2017Updated 8 years ago
- Peak : Processor Specification Language ala Newell and Bell's ISP☆20Dec 5, 2023Updated 2 years ago
- ☆19Dec 21, 2020Updated 5 years ago
- Simple Verilog Parser In Python☆15Dec 31, 2017Updated 8 years ago
- A barebones 64-bit RISC-V micro-controller class CPU, implementing the I(nteger), M(ul/div), C(ompressed) and K(ryptography) extensions.☆48Jan 31, 2022Updated 4 years ago