Alternatives and similar repositories for ghdl-yosys-plugin:

Users that are interested in ghdl-yosys-plugin are comparing it to the libraries listed below

• YosysHQ / prjtrellis
  Documenting the Lattice ECP5 bit-stream format.
  ☆404Updated 2 weeks ago
• YosysHQ / fpga-toolchain
  Multi-platform nightly builds of open source FPGA tools
  ☆294Updated 3 years ago
• skordal / potato
  A simple RISC-V processor for use in FPGA designs.
  ☆266Updated 5 months ago
• olofk / edalize
  An abstraction library for interfacing EDA tools
  ☆655Updated this week
• chipsalliance / f4pga-examples
  Example designs showing different ways to use F4PGA toolchains.
  ☆272Updated 10 months ago
• YosysHQ / sby
  SymbiYosys (sby) -- Front-end for Yosys-based formal verification flows
  ☆421Updated last week
• gatecat / nextpnr-xilinx
  Experimental flows using nextpnr for Xilinx devices
  ☆223Updated 3 months ago
• chipsalliance / f4pga
  FOSS Flow For FPGA
  ☆368Updated 3 weeks ago
• UVVM / UVVM
  UVVM (Universal VHDL Verification Methodology) is a free and Open Source Methodology and Library for very efficient VHDL verification of …
  ☆384Updated last week
• f4pga / f4pga-arch-defs
  FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.
  ☆278Updated this week
• enjoy-digital / litedram
  Small footprint and configurable DRAM core
  ☆388Updated 3 weeks ago
• OSVVM / OSVVM
  OSVVM Utility Library: AlertLogPkg, CoveragePkg, RandomPkg, ScoreboardGenericPkg, MemoryPkg, TbUtilPkg, TranscriptPkg, ...
  ☆233Updated 3 weeks ago
• VLSI-EDA / PoC
  IP Core Library - Published and maintained by the Chair for VLSI Design, Diagnostics and Architecture, Faculty of Computer Science, Techn…
  ☆563Updated 4 years ago
• tymonx / logic
  CMake, SystemVerilog and SystemC utilities for creating, building and testing RTL projects for FPGAs and ASICs.
  ☆274Updated 5 years ago
• zachjs / sv2v
  SystemVerilog to Verilog conversion
  ☆585Updated last month
• f4pga / prjxray
  Documenting the Xilinx 7-series bit-stream format.
  ☆781Updated this week
• ZipCPU / wbuart32
  A simple, basic, formally verified UART controller
  ☆287Updated last year
• slaclab / surf
  A huge VHDL library for FPGA development
  ☆368Updated this week
• olofk / fusesoc
  Package manager and build abstraction tool for FPGA/ASIC development
  ☆1,235Updated 2 weeks ago
• ZipCPU / wb2axip
  Bus bridges and other odds and ends
  ☆511Updated last week
• fusesoc / blinky
  Example LED blinking project for your FPGA dev board of choice
  ☆168Updated 2 months ago
• enjoy-digital / liteeth
  Small footprint and configurable Ethernet core
  ☆220Updated last week
• chipsalliance / sv-tests
  Test suite designed to check compliance with the SystemVerilog standard.
  ☆306Updated this week
• SpinalHDL / SaxonSoc
  SoC based on VexRiscv and ICE40 UP5K
  ☆152Updated 9 months ago
• ZipCPU / autofpga
  A utility for Composing FPGA designs from Peripherals
  ☆170Updated last month
• os-fpga / open-source-fpga-resource
  A list of resources related to the open-source FPGA projects
  ☆395Updated 2 years ago
• hdl4fpga / hdl4fpga
  VHDL library 4 FPGAs
  ☆169Updated last week
• kevinpt / symbolator
  HDL symbol generator
  ☆187Updated last year
• RobertBaruch / nmigen-tutorial
  A tutorial for using nmigen
  ☆310Updated 3 years ago
• minerva-cpu / minerva
  A 32-bit RISC-V soft processor
  ☆308Updated 3 months ago