Alternatives and similar repositories for projf-explore

Users that are interested in projf-explore are comparing it to the libraries listed below

• laforest / FPGADesignElements
  A self-contained online book containing a library of FPGA design modules and related coding/design guides.
  ☆432Updated 8 months ago
• JulianKemmerer / PipelineC
  A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler …
  ☆653Updated this week
• YosysHQ / oss-cad-suite-build
  Multi-platform nightly builds of open source digital design and verification tools
  ☆1,059Updated this week
• zachjs / sv2v
  SystemVerilog to Verilog conversion
  ☆630Updated 2 weeks ago
• olofk / fusesoc
  Package manager and build abstraction tool for FPGA/ASIC development
  ☆1,293Updated this week
• chipsalliance / f4pga
  FOSS Flow For FPGA
  ☆388Updated 4 months ago
• olofk / serv
  SERV - The SErial RISC-V CPU
  ☆1,589Updated 2 weeks ago
• open-logic / open-logic
  Open Logic FPGA Standard Library
  ☆618Updated last week
• ZipCPU / wb2axip
  Bus bridges and other odds and ends
  ☆560Updated last month
• nandland / nandland
  All code found on nandland is here. underconstruction.gif
  ☆330Updated 2 years ago
• YosysHQ / nextpnr
  nextpnr portable FPGA place and route tool
  ☆1,444Updated this week
• VLSI-EDA / PoC
  IP Core Library - Published and maintained by the Chair for VLSI Design, Diagnostics and Architecture, Faculty of Computer Science, Techn…
  ☆579Updated 4 years ago
• slaclab / surf
  A huge VHDL library for FPGA and digital ASIC development
  ☆384Updated this week
• os-fpga / open-source-fpga-resource
  A list of resources related to the open-source FPGA projects
  ☆409Updated 2 years ago
• pulp-platform / common_cells
  Common SystemVerilog components
  ☆623Updated this week
• ultraembedded / core_ddr3_controller
  A DDR3 memory controller in Verilog for various FPGAs
  ☆461Updated 3 years ago
• litex-hub / linux-on-litex-vexriscv
  Linux on LiteX-VexRiscv
  ☆636Updated 3 weeks ago
• skordal / potato
  A simple RISC-V processor for use in FPGA designs.
  ☆274Updated 9 months ago
• AngeloJacobo / UberDDR3
  Opensource DDR3 Controller
  ☆333Updated this week
• lnis-uofu / OpenFPGA
  An Open-source FPGA IP Generator
  ☆914Updated this week
• olofk / edalize
  An abstraction library for interfacing EDA tools
  ☆690Updated 3 weeks ago
• TerosTechnology / vscode-terosHDL
  VHDL and Verilog/SV IDE: state machine viewer, linter, documentation, snippets... and more!
  ☆617Updated last month
• fabriziotappero / ip-cores
  A huge collection of VHDL/Verilog open-source IP cores scraped from the web
  ☆490Updated 2 years ago
• trabucayre / openFPGALoader
  Universal utility for programming FPGA
  ☆1,344Updated this week
• enjoy-digital / litedram
  Small footprint and configurable DRAM core
  ☆414Updated last week
• ZipCPU / wbuart32
  A simple, basic, formally verified UART controller
  ☆303Updated last year
• enjoy-digital / litepcie
  Small footprint and configurable PCIe core
  ☆549Updated last week
• ultraembedded / FPGAmp
  720p FPGA Media Player (RISC-V + Motion JPEG + SD + HDMI on an Artix 7)
  ☆278Updated 4 years ago
• lowRISC / style-guides
  lowRISC Style Guides
  ☆428Updated 8 months ago
• damdoy / ice40_ultraplus_examples
  Examples for iCE40 UltraPlus FPGA: BRAM, SPRAM, SPI, flash, DSP and a working RISC-V implementation
  ☆270Updated last year