projf / projf-explore
Project F brings FPGAs to life with exciting open-source designs you can build on.
☆639Updated 3 months ago
Alternatives and similar repositories for projf-explore:
Users that are interested in projf-explore are comparing it to the libraries listed below
- A self-contained online book containing a library of FPGA design modules and related coding/design guides.☆427Updated 7 months ago
- Multi-platform nightly builds of open source digital design and verification tools☆1,042Updated this week
- SERV - The SErial RISC-V CPU☆1,574Updated last month
- A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler …☆653Updated this week
- SystemVerilog to Verilog conversion☆621Updated last month
- nextpnr portable FPGA place and route tool☆1,425Updated this week
- Package manager and build abstraction tool for FPGA/ASIC development☆1,276Updated 3 weeks ago
- An Open-source FPGA IP Generator☆903Updated this week
- A list of resources related to the open-source FPGA projects☆405Updated 2 years ago
- An abstraction library for interfacing EDA tools☆684Updated this week
- Bus bridges and other odds and ends☆552Updated 3 weeks ago
- A huge VHDL library for FPGA and digital ASIC development☆382Updated this week
- Linux on LiteX-VexRiscv☆633Updated last month
- lowRISC Style Guides☆425Updated 7 months ago
- Universal utility for programming FPGA☆1,315Updated last week
- VHDL and Verilog/SV IDE: state machine viewer, linter, documentation, snippets... and more!☆612Updated last month
- Common SystemVerilog components☆608Updated 3 weeks ago
- FOSS Flow For FPGA☆386Updated 4 months ago
- IP Core Library - Published and maintained by the Chair for VLSI Design, Diagnostics and Architecture, Faculty of Computer Science, Techn…☆579Updated 4 years ago
- A DDR3 memory controller in Verilog for various FPGAs☆445Updated 3 years ago
- 32-bit Superscalar RISC-V CPU☆1,005Updated 3 years ago
- 720p FPGA Media Player (RISC-V + Motion JPEG + SD + HDMI on an Artix 7)☆278Updated 4 years ago
- Open Logic FPGA Standard Library☆586Updated this week
- A simple RISC-V processor for use in FPGA designs.☆271Updated 8 months ago
- A simple, basic, formally verified UART controller☆300Updated last year
- BaseJump STL: A Standard Template Library for SystemVerilog☆570Updated last week
- UVVM (Universal VHDL Verification Methodology) is a free and Open Source Methodology and Library for very efficient VHDL verification of …☆397Updated 3 weeks ago
- A huge collection of VHDL/Verilog open-source IP cores scraped from the web☆465Updated 2 years ago
- Various HDL (Verilog) IP Cores☆779Updated 3 years ago
- Opensource DDR3 Controller☆319Updated 2 weeks ago