YosysHQ / apiculaView external linksLinks
Project Apicula 🐝: bitstream documentation for Gowin FPGAs
☆631Feb 7, 2026Updated last week
Alternatives and similar repositories for apicula
Users that are interested in apicula are comparing it to the libraries listed below
Sorting:
- Universal utility for programming FPGA☆1,546Updated this week
- nextpnr portable FPGA place and route tool☆1,612Updated this week
- Documenting the Lattice ECP5 bit-stream format.☆442Oct 27, 2025Updated 3 months ago
- Documenting Lattice's 28nm FPGA parts☆148Updated this week
- Documenting the Anlogic FPGA bit-stream format.☆88Dec 25, 2022Updated 3 years ago
- Project IceStorm - Lattice iCE40 FPGAs Bitstream Documentation (Reverse Engineered)☆1,129Sep 22, 2025Updated 4 months ago
- Yosys Open SYnthesis Suite☆4,272Updated this week
- Experimental flows using nextpnr for Xilinx devices☆253Oct 11, 2024Updated last year
- PicoRV32 - A Size-Optimized RISC-V CPU☆3,945Jun 27, 2024Updated last year
- Silice is an easy-to-learn, powerful hardware description language, that simplifies designing hardware algorithms with parallelism and pi…☆1,396Jan 5, 2026Updated last month
- User-friendly explanation of Yosys options☆113Sep 25, 2021Updated 4 years ago
- Multi-platform nightly builds of open source digital design and verification tools☆1,351Updated this week
- A modern hardware definition language and toolchain based on Python☆1,906Jan 26, 2026Updated 2 weeks ago
- Build your hardware, easily!☆3,722Updated this week
- PCB for ULX3S FPGA R&D board☆422Apr 27, 2025Updated 9 months ago
- SERV - The SErial RISC-V CPU☆1,751Updated this week
- Various iCE40 cores / projects to play around with (mostly targeted at the icebreaker)☆259Aug 21, 2023Updated 2 years ago
- Documenting the Xilinx 7-series bit-stream format.☆849Jun 5, 2025Updated 8 months ago
- Visual editor for open FPGA boards☆1,868Jan 1, 2026Updated last month
- Open source ecosystem for open FPGA boards☆949Feb 9, 2026Updated last week
- Learning FPGA, yosys, nextpnr, and RISC-V☆3,392Nov 18, 2025Updated 2 months ago
- Miscellaneous ULX3S examples (advanced)☆82Feb 7, 2026Updated last week
- NESTang is an FPGA Nintendo Entertainment System implemented with Sipeed Tang Primer 25K, Nano 20K and Primer 20K boards☆428Jun 20, 2025Updated 7 months ago
- Linsn RV901T HUB75 LED "Receiver Card" Reverse Engineering☆614May 30, 2025Updated 8 months ago
- ECP5 breakout board in a feather physical format☆522Nov 6, 2024Updated last year
- Examples for the Lushay Labs tang nano 9k series☆129Jun 12, 2024Updated last year
- Multi-platform nightly builds of open source FPGA tools☆301Nov 3, 2021Updated 4 years ago
- An attempt to recreate the RP2040 PIO in an FPGA☆309Jun 6, 2024Updated last year
- Project F brings FPGAs to life with exciting open-source designs you can build on.☆747Jan 28, 2026Updated 2 weeks ago
- List of FPGA Lattice boards using open tools☆349Jun 22, 2025Updated 7 months ago
- 32-bit RISC-V system on chip for iCE40 FPGAs☆313May 25, 2023Updated 2 years ago
- Swapforth is a cross-platform ANS Forth☆297Dec 26, 2023Updated 2 years ago
- Information on cores available on the Ulx3s ECP5 FPGA board☆14May 1, 2020Updated 5 years ago
- iCESugar FPGA Board (base on iCE40UP5k)☆423Sep 16, 2025Updated 5 months ago
- A FPGA friendly 32 bit RISC-V CPU implementation☆3,008Dec 15, 2025Updated 2 months ago
- Tang-Nano-examples☆68Sep 16, 2021Updated 4 years ago
- Experiments with Yosys cxxrtl backend☆50Jan 16, 2025Updated last year
- 3-stage RV32IMACZb* processor with debug☆1,001Dec 14, 2025Updated 2 months ago
- Linux on LiteX-VexRiscv☆685Dec 29, 2025Updated last month