The Riallto Open Source Project from AMD
☆87Apr 10, 2025Updated last year
Alternatives and similar repositories for Riallto
Users that are interested in Riallto are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- NPUEval is an LLM evaluation dataset written specifically to target AIE kernel code generation on RyzenAI hardware.☆34Nov 8, 2025Updated 11 months ago
- ☆25Oct 24, 2026Updated last week
- Fork of LLVM to support AMD AIEngine processors☆216Updated this week
- IREE plugin repository for the AMD AIE accelerator☆137Sep 7, 2026Updated last month
- Ryzen AI Dockerfiles for ML, Robotics and Development Environments☆90Updated this week
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- ☆62Sep 15, 2023Updated 3 years ago
- A close-to-metal Python API for programming AMD Ryzen™ AI NPUs (AI Engines), built on an open-source MLIR-based compiler toolchain.☆710Updated this week
- An alternative Vivado custom design example (to fully Vitis) for the User Logic Partition targeting VCK5000☆14Jul 16, 2024Updated 2 years ago
- ☆152Updated this week
- Hands-on experience programming AI Engines using Vitis Unified Software Platform☆43Jul 24, 2024Updated 2 years ago
- AUP AI Tutorials☆15Sep 14, 2026Updated last month
- Open-source AI acceleration on FPGA: from ONNX to RTL☆62Oct 9, 2026Updated 3 weeks ago
- AMD XDNA Driver (amdxdna.ko) for Linux and XRT SHIM library☆622Updated this week
- Xilinx Modifications to Halide☆14May 3, 2021Updated 5 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- SAMO: Streaming Architecture Mapping Optimisation☆36Oct 4, 2023Updated 3 years ago
- PYNQ Composabe Overlays☆81Jun 17, 2024Updated 2 years ago
- An LLVM pass to prove that an II works for the given loop for Vitis HLS☆11Aug 22, 2021Updated 5 years ago
- [FPGA 2021, Best Paper Award] An automated floorplanning and pipelining tool for Vivado HLS.☆127Jan 3, 2023Updated 3 years ago
- Quantized ResNet50 Dataflow Acceleration on Alveo, with PYNQ☆62Nov 23, 2021Updated 4 years ago
- AMD Ryzen™ AI Software includes the tools and runtime libraries for optimizing and deploying AI inference on AMD Ryzen™ AI powered PCs.☆894Updated this week
- Heterogeneous Accelerated Computed Cluster (HACC) Resources Page☆22Oct 23, 2026Updated last week
- ☆10Sep 19, 2019Updated 7 years ago
- Build Customized FPGA Implementations for Vivado☆395Updated this week
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- ☆30Mar 19, 2019Updated 7 years ago
- Run Time for AIE and FPGA based platforms☆692Updated this week
- Vitis HLS Library for FINN☆229Updated this week
- ☆30Mar 21, 2018Updated 8 years ago
- A POC platform and example for an experimental ROCm runtime release for the AMD AI Engine☆14Mar 19, 2025Updated last year
- ☆15Jun 14, 2022Updated 4 years ago
- EQueue Dialect☆43Feb 3, 2022Updated 4 years ago
- Train and deploy LUT-based neural networks on FPGAs☆124Jun 12, 2024Updated 2 years ago
- ☆58Oct 23, 2026Updated last week
- Open source password manager - Proton Pass • AdSecurely store, share, and autofill your credentials with Proton Pass, the end-to-end encrypted password manager trusted by millions.
- The Next-gen Language & Compiler Powering Efficient Hardware Design☆41Jan 16, 2025Updated last year
- AMD PACE is a PyTorch extension for high-performance LLM inference on AMD CPUs. It provides a framework to develop and test novel optimiz…☆16Oct 21, 2026Updated last week
- AMD HPC Research Fund Cloud☆21Updated this week
- A novel spatial accelerator for horizontal diffusion weather stencil computation, as described in ICS 2023 paper by Singh et al. (https:/…☆23Jul 27, 2023Updated 3 years ago
- MaxEVA: Maximizing the Efficiency of Matrix Multiplication on Versal AI Engine (accepted as full paper at FPT'23)☆22Apr 17, 2024Updated 2 years ago
- An MLIR-based compiler from C/C++ to AMD-Xilinx Versal AIE☆17Aug 5, 2022Updated 4 years ago
- Xilinx Contest Kshitij 2019☆19May 31, 2023Updated 3 years ago