Alternatives and similar repositories for ScalaBFS:

Users that are interested in ScalaBFS are comparing it to the libraries listed below

• UIUC-ChenLab / Nimblock
  ☆13Updated last year
• SFU-HiAccel / uBench
  [FPGA'21] Microbenchmarks for Demystifying the Memory System of Modern Datacenter FPGAs for Software Programmers
  ☆30Updated 3 years ago
• CGCL-codes / ScalaBFS
  A Scalable BFS Accelerator on FPGA-HBM Platform
  ☆14Updated last year
• PolyArch / dsagen2
  Domain-Specific Architecture Generator 2
  ☆20Updated 2 years ago
• UCLA-VAST / hbmbench
  ☆23Updated 4 years ago
• UCLA-VAST / splag
  Accelerating SSSP for power-law graphs using an FPGA.
  ☆23Updated 3 years ago
• MPSLab-ASU / dMazeRunner
  dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators
  ☆45Updated 3 years ago
• he-actlab / planaria.code
  ☆25Updated 3 years ago
• jasonlin316 / GCN-Inference-Acceleration-HLS
  An end-to-end GCN inference accelerator written in HLS
  ☆19Updated 3 years ago
• MPSLab-ASU / DiRAC
  Dynamically Reconfigurable Architecture Template and Cycle-level Microarchitecture Simulator for Dataflow AcCelerators
  ☆28Updated last year
• scalesim-project / krittika
  Heterogenous ML accelerator
  ☆18Updated 6 months ago
• cucapra / EventQueue
  EQueue Dialect
  ☆40Updated 3 years ago
• AlbertoParravicini / approximate-spmv-topk
  Public repostory for the DAC 2021 paper "Scaling up HBM Efficiency of Top-K SpMV forApproximate Embedding Similarity on FPGAs"
  ☆14Updated 3 years ago
• pgroupATusc / GraphACT
  Implementation of paper "GraphACT: Accelerating GCN Training on CPU-FPGA Heterogeneous Platform".
  ☆10Updated 4 years ago
• Xtra-Computing / ReGraph
  Scaling Graph Processing on HBM-enabled FPGAs with Heterogeneous Pipelines
  ☆17Updated 2 years ago
• SwarmArch / chronos
  The Chronos FPGA Framework to accelerate ordered applications
  ☆22Updated 4 years ago
• Systems-ShiftLab / MultiPIM
  MultiPIM: A Detailed and Configurable Multi-Stack Processing-In-Memory Simulator
  ☆53Updated 3 years ago
• mohsaied / rtl2booksim
  Network-on-Chip simulator (Booksim) with hooks for co-simulating RTL designs in Verilog.
  ☆20Updated 9 years ago
• PolyArch / gem-forge-framework
  ☆25Updated last year
• sfu-arch / SpGEMM
  ☆35Updated 4 years ago
• gthparch / HBM
  High Bandwidth Memory (HBM) timing model based on DRAMSim2
  ☆41Updated 7 years ago
• PrincetonUniversity / MosaicSim
  Heterogeneous simulator for DECADES Project
  ☆32Updated 11 months ago
• SwarmArch / sim
  ordspecsim: The Swarm architecture simulator
  ☆24Updated 2 years ago
• PKUZHOU / GNNear-PACT-2022
  GNNear: Accelerating Full-Batch Training of Graph NeuralNetworks with Near-Memory Processing
  ☆13Updated 2 years ago
• estwings57 / CasHMC
  CasHMC: A Cycle-accurate Simulator for Hybrid Memory Cube
  ☆21Updated 6 years ago
• Liu-Cheng / cycle-accurate-SystemC-simulator-over-ramulator
  An example of using Ramulator as memory model in a cycle-accurate SystemC Design
  ☆49Updated 7 years ago
• synergy-noc-generators / Proteus
  ☆10Updated 2 years ago
• sharc-lab / gnn-builder
  An Automated Framework for Generic Graph Neural Network Accelerator Generation, Simulation, and Optimization
  ☆21Updated 5 months ago
• cornell-zhang / GLAIVE
  Graph-learning assisted instruction vulnerability estimation published in DATE 2020
  ☆13Updated 4 years ago
• stonne-simulator / sst-elements-with-stonne
  STONNE Simulator integrated into SST Simulator
  ☆19Updated last year