Alternatives and similar repositories for Shuhai

Users that are interested in Shuhai are comparing it to the libraries listed below

• Xtra-Computing / ThunderGP
  HLS-based Graph Processing Framework on FPGAs
  ☆149Updated 3 years ago
• arc-research-lab / CHARM
  CHARM: Composing Heterogeneous Accelerators on Heterogeneous SoC Architecture
  ☆162Updated last week
• cwfletcher / buffets
  Implementations of Buffets, which are efficient, composable idioms for implementing Explicit Decoupled Data Orchestration.
  ☆82Updated 6 years ago
• SFU-HiAccel / uBench
  [FPGA'21] Microbenchmarks for Demystifying the Memory System of Modern Datacenter FPGAs for Software Programmers
  ☆31Updated 4 years ago
• cornell-zhang / HiSparse
  High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS
  ☆95Updated last year
• UCLA-VAST / hbmbench
  ☆24Updated 5 years ago
• tukl-msd / DRAMPower
  Fast and accurate DRAM power and energy estimation tool
  ☆189Updated this week
• maeri-project / MAERI_bsv
  MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)
  ☆67Updated 4 years ago
• cornell-zhang / rosetta
  Rosetta: A Realistic High-level Synthesis Benchmark Suite for Software Programmable FPGAs (FPGA'18)
  ☆169Updated 2 years ago
• linghaosong / Sextans
  An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).
  ☆92Updated last year
• GT-CHIPS / gem5_chips
  gem5 repository to study chiplet-based systems
  ☆86Updated 6 years ago
• stonne-simulator / stonne
  STONNE: A Simulation Tool for Neural Networks Engines
  ☆145Updated 7 months ago
• UCLA-VAST / tapa
  TAPA compiles task-parallel HLS program into high-performance FPGA accelerators. UCLA-maintained.
  ☆180Updated 5 months ago
• georgia-tech-synergy-lab / SIGMA
  RTL implementation of Flex-DPE.
  ☆115Updated 5 years ago
• PrincetonUniversity / muchiSim
  Simulator framework for analysis of performance, energy consumption, area and cost of multi-node multi-chiplet tile-based manycore design…
  ☆75Updated last year
• sharc-lab / FlowGNN
  A dataflow architecture for universal graph neural network inference via multi-queue streaming.
  ☆75Updated 3 years ago
• Yinxiao-Feng / chiplet-network-sim
  ☆55Updated 8 months ago
• groupsada / DeepBurning
  Automatic generation of FPGA-based learning accelerators for the neural network family
  ☆68Updated 6 years ago
• PolyArch / dsa-framework
  Release of stream-specialization software/hardware stack.
  ☆120Updated 2 years ago
• breagen / MachSuite
  Benchmarks for Accelerator Design and Customized Architectures
  ☆136Updated 5 years ago
• SEAL-UCSB / NVSim
  NVSim - A performance, energy and area estimation tool for non-volatile memory (NVM)
  ☆134Updated 7 years ago
• harvard-acc / smaug
  SMAUG: Simulating Machine Learning Applications Using Gem5-Aladdin
  ☆114Updated 3 years ago
• tancheng / CGRA-Flow
  CGRA-Flow is an integrated framework for CGRA compilation, exploration, synthesis, and development.
  ☆152Updated this week
• UCLA-VAST / AutoBridge
  [FPGA 2021, Best Paper Award] An automated floorplanning and pipelining tool for Vivado HLS.
  ☆127Updated 3 years ago
• Accelergy-Project / timeloop-accelergy-exercises
  Exercises for exploring the Fibertree, Timeloop and Accelergy tools
  ☆114Updated 10 months ago
• Xilinx / xup_aie_training
  Hands-on experience programming AI Engines using Vitis Unified Software Platform
  ☆40Updated last year
• pku-dasys / pillars
  An integrated CGRA design framework
  ☆91Updated 10 months ago
• Accelergy-Project / accelergy
  Accelergy is an energy estimation infrastructure for accelerator energy estimations
  ☆155Updated 8 months ago
• UCLA-VAST / AutoSA
  AutoSA: Polyhedral-Based Systolic Array Compiler
  ☆237Updated 3 years ago
• TeCSAR-UNCC / gem5-SALAM
  ☆109Updated last year