Alternatives and similar repositories for ScalaBFS

Users that are interested in ScalaBFS are comparing it to the libraries listed below

• UCLA-VAST / hbmbench
  ☆24Updated 4 years ago
• UCLA-VAST / splag
  Accelerating SSSP for power-law graphs using an FPGA.
  ☆23Updated 3 years ago
• Xtra-Computing / ReGraph
  Scaling Graph Processing on HBM-enabled FPGAs with Heterogeneous Pipelines
  ☆18Updated 2 years ago
• lizardll / ScalaBFS
  A Scalable BFS Accelerator on FPGA-HBM Platform
  ☆13Updated 3 years ago
• maltanar / spmvaccsim
  A SystemC + DRAMSim2 simulator for exploring the SpMV hardware accelerator design space.
  ☆14Updated 10 years ago
• pgroupATusc / GraphACT
  Implementation of paper "GraphACT: Accelerating GCN Training on CPU-FPGA Heterogeneous Platform".
  ☆10Updated 4 years ago
• NeuraChip / neurachip
  NeuraChip Accelerator Simulator
  ☆12Updated last year
• Liu-Cheng / cycle-accurate-SystemC-simulator-over-ramulator
  An example of using Ramulator as memory model in a cycle-accurate SystemC Design
  ☆50Updated 7 years ago
• SFU-HiAccel / uBench
  [FPGA'21] Microbenchmarks for Demystifying the Memory System of Modern Datacenter FPGAs for Software Programmers
  ☆31Updated 3 years ago
• sfu-arch / SpGEMM
  ☆35Updated 4 years ago
• jasonlin316 / GCN-Inference-Acceleration-HLS
  An end-to-end GCN inference accelerator written in HLS
  ☆19Updated 3 years ago
• KastnerRG / Spector-HLS
  Contains FPGA benchmarks for Vivado HLS and Catapult HLS
  ☆26Updated 4 years ago
• tukl-msd / DRAMSpec
  A High-Level DRAM Timing, Power and Area Exploration Tool
  ☆28Updated 4 years ago
• UIUC-ChenLab / Nimblock
  ☆13Updated last year
• linghaosong / Serpens
  An HBM FPGA based SpMV Accelerator
  ☆12Updated 9 months ago
• PolyArch / dsagen2
  Domain-Specific Architecture Generator 2
  ☆21Updated 2 years ago
• MPSLab-ASU / DiRAC
  Dynamically Reconfigurable Architecture Template and Cycle-level Microarchitecture Simulator for Dataflow AcCelerators
  ☆28Updated last year
• zslwyuan / PAAS_V1.0
  PAAS: A System Level Simulator for Heterogeneous (CPU-FPGA) Computing Systems
  ☆43Updated 3 years ago
• yhqiu16 / TRAM
  Template-based Reconfigurable Architecture Modeling Framework
  ☆14Updated 2 years ago
• tancheng / CGRA-Bench
  ☆15Updated 2 years ago
• ecolab-nus / morpher-v2
  An Open-Source Tool for CGRA Accelerators
  ☆21Updated last year
• FCAS-LAB / chiplet_simulators
  A list of our chiplet simulaters
  ☆32Updated 2 months ago
• m-asiatici / MSHR-rich
  A multi-banked non-blocking cache that handles efficiently thousands of outstanding misses, especially suited for bandwidth-bound latency…
  ☆20Updated 4 years ago
• esl-epfl / HEEPsilon
  A low power platform based on X-HEEP and integrating the ESL-CGRA
  ☆14Updated 7 months ago
• MPSLab-ASU / dMazeRunner
  dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators
  ☆45Updated 3 years ago
• arc-research-lab / AIM
  AIM: Accelerating Arbitrary-precision Integer Multiplication on Heterogeneous Reconfigurable Computing Platform Versal ACAP (Full Paper a…
  ☆22Updated 2 weeks ago
• stonne-simulator / sst-elements-with-stonne
  STONNE Simulator integrated into SST Simulator
  ☆19Updated last year
• jmjos / ratatoskr
  Ratatoskr NoC Simulator
  ☆26Updated 4 years ago
• estwings57 / CasHMC
  CasHMC: A Cycle-accurate Simulator for Hybrid Memory Cube
  ☆22Updated 6 years ago
• diwu1990 / uSystolic-Sim
  A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.
  ☆77Updated 3 years ago