TinyTapeout / tt-support-toolsLinks
tools used by project repos to test configuration, generate OpenLane run summaries and documentation
☆24Updated last week
Alternatives and similar repositories for tt-support-tools
Users that are interested in tt-support-tools are comparing it to the libraries listed below
Sorting:
- ☆36Updated 9 months ago
- A minimal-area RISC-V core with a scalable data path to 1, 2, 4, or 8 bits and manifold variants.☆105Updated 2 weeks ago
- ♻️ Convert the NEORV32 processor into a synthesizable plain-Verilog netlist module using GHDL.☆94Updated last week
- Open source designs developed with IHP 130nm BiCMOS Open Source PDK. Documentation at https://ihp-open-ip.readthedocs.io/en/latest/☆57Updated this week
- SAR ADC on tiny tapeout☆42Updated 7 months ago
- Experimental Tiny Tapeout chip on IHP SG13G2 0.13 μm BiCMOS process☆18Updated 4 months ago
- Spicing up the first and (no longer) the only EU FPGA chip with a flashy new board, loaded with a suite of engaging demos and examples =>…☆67Updated 2 weeks ago
- An Amateur Radio Transceiver IC (2.4 / 5 / 10 GHz)☆71Updated 3 years ago
- A current mode buck converter on the SKY130 PDK☆29Updated 4 years ago
- Flip flop setup, hold & metastability explorer tool☆46Updated 2 years ago
- End-to-End Open-Source I2C GPIO Expander☆33Updated last month
- 8x PLL Clock Multiplier IP with an input frequency range of 5Mhz to 12.5Mhz and output frequency range of 40Mhz to 100Mhz, giving a 8x mu…☆114Updated 4 years ago
- Solving Sudokus using open source formal verification tools☆17Updated 3 years ago
- A pipelined RISC-V processor☆57Updated last year
- Demo projects for various Kintex FPGA boards☆62Updated 3 months ago
- SOFA (Skywater Opensource FPGAs) based on Skywater 130nm PDK and OpenFPGA☆141Updated 2 years ago
- The ILA allows you to perform in-system debugging of your designs on the GateMate FPGA at runtime. All signals of your design inside the …☆53Updated 3 months ago
- Submission template for Tiny Tapeout 8 - Verilog HDL Projects☆18Updated last year
- RISC-V SoC Physical Implementation in 180 nm CMOS with a Quark Core Based on FemtoRV32☆47Updated last year
- Collection of projects for various FPGA development boards☆45Updated last year
- Drawio => VHDL and Verilog☆57Updated last year
- Example of how to get started with olofk/fusesoc.☆17Updated 4 years ago
- A repository for Known Good Designs (KGDs). Does not contain any design files with NDA-sensitive information.☆36Updated 4 years ago
- Framework Open EDA Gui☆68Updated 8 months ago
- ☆55Updated last month
- Greyhound on IHP SG13G2 0.13 μm BiCMOS process☆53Updated 3 weeks ago
- Digital systems are clocked. This project is about constructing a high-Q clock by simmering an ordinary quartz crystal in a heavy numeric…☆11Updated this week
- FPGA examples on Google Colab☆27Updated 2 weeks ago
- Arduino compatible Risc-V Based SOC☆155Updated last year
- Show the time on a VGA monitor. Submitted for the Google MPW1 ASIC shuttle.☆62Updated 3 years ago