TinyTapeout / tt-support-toolsLinks
tools used by project repos to test configuration, generate OpenLane run summaries and documentation
☆23Updated 2 weeks ago
Alternatives and similar repositories for tt-support-tools
Users that are interested in tt-support-tools are comparing it to the libraries listed below
Sorting:
- End-to-End Open-Source I2C GPIO Expander☆32Updated 2 weeks ago
- Demo board for TT04 and beyond☆21Updated 4 months ago
- an inverter drawn in magic with makefile to simulate☆26Updated 3 years ago
- Open source designs developed with IHP 130nm BiCMOS Open Source PDK. Documentation at https://ihp-open-ip.readthedocs.io/en/latest/☆52Updated 3 months ago
- A reconfigurable logic circuit made of identical rotatable tiles.☆22Updated 3 years ago
- Fully featured implementation of Inter-IC (I2C) bus master for FPGAs☆28Updated 5 years ago
- Wishbone controlled I2C controllers☆50Updated 8 months ago
- Benchmarks for Yosys development☆24Updated 5 years ago
- A current mode buck converter on the SKY130 PDK☆27Updated 4 years ago
- ☆35Updated 8 months ago
- Spicing up the first and (no longer) the only EU FPGA chip with a flashy new board, loaded with a suite of engaging demos and examples =>…☆66Updated this week
- Small SERV-based SoC primarily for OpenMPW tapeout☆44Updated last month
- A collection of debugging busses developed and presented at zipcpu.com☆41Updated last year
- Experimental Tiny Tapeout chip on IHP SG13G2 0.13 μm BiCMOS process☆18Updated 3 months ago
- FPGA 101 - Workshop materials☆76Updated 6 years ago
- Project IceStorm - Lattice iCE40 FPGAs Bitstream Documentaion (Reverse Engineered)☆34Updated 3 years ago
- Convenience script to install the nextpnr-xilinx toolchain for Kintex7, Artix7, Spartan7 and Zynq7☆85Updated 3 weeks ago
- Show the time on a VGA monitor. Submitted for the Google MPW1 ASIC shuttle.☆62Updated 3 years ago
- Small footprint and configurable Inter-Chip communication cores☆60Updated last week
- A minimal-area RISC-V core with a scalable data path to 1, 2, 4, or 8 bits and manifold variants.☆95Updated last month
- TinyTapeout demo pcb's RP2040 functionality☆12Updated 4 months ago
- A RocketChip rv64imac blinky for yosys/nextpnr/trellis & the Lattice ECP5 fpga☆26Updated 5 years ago
- Submission template for Tiny Tapeout 8 - Verilog HDL Projects☆18Updated last year
- Custom IC Creator (ciccreator) is a compiler that takes in a object definition file (JSON), a SPICE file, and a design rule file and outp…☆34Updated 3 weeks ago
- Demo of how to use https://github.com/openXC7 tools (yosys+nextpnr-xilinx) to implement the HW side of a custom SoC with RISC-V CPU & our…☆27Updated 4 months ago
- A Dockerfile with a collections of ready to use open source EDA tools: Yosys, SimbiYosys (with Z3, boolector and Yices2), nextpnr-ice40, …☆44Updated 2 years ago
- Wishbone interconnect utilities☆41Updated 5 months ago
- RISC-V SoC Physical Implementation in 180 nm CMOS with a Quark Core Based on FemtoRV32☆47Updated last year
- Coriolis VLSI EDA Tool (LIP6)☆68Updated this week
- RISC-V Processor written in Amaranth HDL☆38Updated 3 years ago