Daikon-Sun / Physical-Design-for-Nanometer-ICsLinks
Assignments of Physical Design for Nanometer ICs (Spring 2017, Prof. Yao-Wen Chang)
☆43Updated 6 years ago
Alternatives and similar repositories for Physical-Design-for-Nanometer-ICs
Users that are interested in Physical-Design-for-Nanometer-ICs are comparing it to the libraries listed below
Sorting:
- AMF-Placer 2.0: An open-source timing-driven analytical mixed-size FPGA placer of heterogeneous resources (LUT/FF/LUTRAM/MUX/CARRY/DSP/BR…☆107Updated last year
- VLSI EDA Global Router☆77Updated 7 years ago
- Xplace 3.0: An Extremely Fast, Extensible and Deterministic Placement Framework with Detailed-Routability and Timing Optimization☆148Updated 5 months ago
- CUGR, VLSI Global Routing Tool Developed by CUHK☆140Updated 2 years ago
- Collection of digital hardware modules & projects (benchmarks)☆74Updated this week
- Open Source Detailed Placement engine☆40Updated 6 years ago
- Rsyn – An Extensible Physical Synthesis Framework☆133Updated last year
- GPU-based logic synthesis tool☆97Updated 2 weeks ago
- DATC RDF☆50Updated 5 years ago
- Dr. CU, VLSI Detailed Routing Tool Developed by CUHK☆140Updated 2 years ago
- EDA physical synthesis optimization kit☆63Updated 2 years ago
- Library for VLSI CAD Design Useful parsers and solvers' api are implemented.☆187Updated 6 months ago
- ☆40Updated 3 years ago
- Pin-Accessible Legalization for Mixed-Cell-Height Circuits☆29Updated 3 years ago
- 🕹 OpenPARF: An Open-Source Placement and Routing Framework for Large-Scale Heterogeneous FPGAs with Deep Learning Toolkit☆162Updated 7 months ago
- An Open-Source Analytical Placer for Large Scale Heterogeneous FPGAs using Deep-Learning Toolkit☆88Updated 7 months ago
- Courseworks of CS6165 VLSI Physical Design Automation, NTHU.☆49Updated 4 years ago
- Artificial Netlist Generator☆44Updated last year
- ☆29Updated last year
- NTHU CS6135 VLSI Physical Design Automation Course Projects (include Two-way Min-cut Partitioning, Fixed-outline Slicing Floorplan Design…☆42Updated 3 months ago
- The first version of TritonPart☆29Updated last year
- Material for OpenROAD Tutorial at DAC 2020☆46Updated 3 years ago
- ☆34Updated 5 years ago
- RePlAce global placement tool☆242Updated 5 years ago
- A collection of ISCAS,ITC,TAU and other Benchmark Circuits for EDA tool evaluation.☆58Updated 10 months ago
- ☆48Updated last year
- MasterRTL: A Pre-Synthesis PPA Estimation Framework for Any RTL Design☆59Updated 6 months ago
- ☆15Updated 3 years ago
- IDEA project source files☆110Updated last month
- reference block design for the ASAP7nm library in Cadence Innovus☆52Updated last year