Alternatives and similar repositories for metis_unicorn

Users that are interested in metis_unicorn are comparing it to the libraries listed below

• TILOS-AI-Institute / HypergraphPartitioning
  Hypergraph Partitioning: benchmarks, evaluators, best known solutions and codes
  ☆69Updated last month
• TimingPredict / TimingPredict
  Official open source repository for "A Timing Engine Inspired Graph Neural Network Model for Pre-Routing Slack Prediction" (DAC 2022)
  ☆76Updated 10 months ago
• DfX-NYUAD / GNN4IC
  Must-read papers on Graph Neural Networks (GNNs) for Integrated Circuits (ICs) design, security and reliability.
  ☆58Updated last week
• ABKGroup / TritonRoute-WXL
  ☆31Updated 4 years ago
• Daikon-Sun / Physical-Design-for-Nanometer-ICs
  Assignments of Physical Design for Nanometer ICs (Spring 2017, Prof. Yao-Wen Chang)
  ☆41Updated 6 years ago
• luckyrantanplan / nthu-route
  VLSI EDA Global Router
  ☆73Updated 7 years ago
• zshi0616 / DeepGate2
  ☆28Updated last year
• daeyeon22 / artificial_netlist_generator
  Artificial Netlist Generator
  ☆39Updated last year
• lrakai / gate-sizing
  Optimal gate sizing of digital circuits using geometric programming
  ☆11Updated 8 years ago
• ABKGroup / PlacementEssentialReadings
  ☆57Updated 4 years ago
• zslwyuan / AMF-Placer
  AMF-Placer 2.0: An open-source timing-driven analytical mixed-size FPGA placer of heterogeneous resources (LUT/FF/LUTRAM/MUX/CARRY/DSP/BR…
  ☆105Updated last year
• cuhk-eda / Xplace
  Xplace 3.0: An Extremely Fast, Extensible and Deterministic Placement Framework with Detailed-Routability and Timing Optimization
  ☆128Updated 3 weeks ago
• krzhu / abcRL
  MLCAD 2020: Reinforcement for logic optimization sequence exploration
  ☆28Updated 4 years ago
• lydiawunan / LOSTIN
  LOSTIN: Logic Optimization via Spatio-Temporal Information with Hybrid Graph Models
  ☆23Updated 3 years ago
• krzhu / abc_py
  Simple Python interface for ABC
  ☆23Updated 2 years ago
• TILOS-AI-Institute / MLCAD-2023-FPGA-Macro-Placement-Contest
  ☆30Updated last year
• IntelLabs / FloorSet
  ☆73Updated last month
• recurme / Mixed-Cell-Height_legalizer
  ☆11Updated last year
• limbo018 / Limbo
  Library for VLSI CAD Design Useful parsers and solvers' api are implemented.
  ☆172Updated 2 months ago
• UMN-EDA / BeGAN-benchmarks
  ☆25Updated 2 years ago
• cuhk-eda / dr-cu
  Dr. CU, VLSI Detailed Routing Tool Developed by CUHK
  ☆135Updated 2 years ago
• rachelselinar / DREAMPlaceFPGA
  An Open-Source Analytical Placer for Large Scale Heterogeneous FPGAs using Deep-Learning Toolkit
  ☆82Updated 2 months ago
• lnis-uofu / ML-Mapper
  ☆11Updated 2 years ago
• bu-icsg / TAP-2.5D
  ☆34Updated 4 years ago
• cuhk-eda / cu-gr
  CUGR, VLSI Global Routing Tool Developed by CUHK
  ☆137Updated 2 years ago
• gaflach / usizer
  discrete gate sizing
  ☆14Updated 4 years ago
• ieee-ceda-datc / RDF-2019
  DATC RDF
  ☆51Updated 4 years ago
• cuhk-eda / CULS
  GPU-based logic synthesis tool
  ☆83Updated 3 weeks ago
• ABKGroup / TritonPart
  The first version of TritonPart
  ☆27Updated last year
• cure-lab / DeepGate2
  ☆15Updated 2 years ago