hlslibs / hls_tutorialsLinks
Tutorials on HLS Design
☆52Updated 5 years ago
Alternatives and similar repositories for hls_tutorials
Users that are interested in hls_tutorials are comparing it to the libraries listed below
Sorting:
- Algorithmic C Machine Learning Library☆23Updated 6 months ago
- Contains FPGA benchmarks for Vivado HLS and Catapult HLS☆26Updated 5 years ago
- This course provides professors with an understanding of high-level synthesis design methodologies necessary to develop digital systems u…☆53Updated 6 years ago
- HLS for Networks-on-Chip☆35Updated 4 years ago
- TensorCore Vector Processor for Deep Learning - Google Summer of Code Project☆22Updated 3 years ago
- ☆59Updated 4 years ago
- NoC (Network-on-Chip) generator that generates Verilog HDL model of NoC consisting of on-chip routers☆63Updated 5 years ago
- Prototype-network-on-chip (ProNoC) is an EDA tool that facilitates prototyping of custom heterogeneous NoC-based many-core-SoC (MCSoC).☆57Updated last week
- A 32-bit RISC-V Processor Designed with High-Level Synthesis☆52Updated 5 years ago
- Digital Hardware Modelling using VHDL, Verilog, SystemVerilog, SystemC, HLS(C++, OpenCL)☆66Updated 4 months ago
- Provides the hardware code for the paper "EBPC: Extended Bit-Plane Compression for Deep Neural Network Inference and Training Accelerator…☆24Updated 4 years ago
- Matchlib Connections Library - latency insensitive channels (from NVlabs/matchlib/connections)☆39Updated last month
- CNN accelerator☆27Updated 8 years ago
- PYNQ Composabe Overlays☆73Updated last year
- Rosetta: A Realistic High-level Synthesis Benchmark Suite for Software Programmable FPGAs☆165Updated last year
- An Open Workflow to Build Custom SoCs and run Deep Models at the Edge☆81Updated last month
- General Purpose AXI Direct Memory Access☆51Updated last year
- Introductory examples for using PYNQ with Alveo☆51Updated 2 years ago
- 16-bit Adder Multiplier hardware on Digilent Basys 3☆76Updated last year
- 32 - bit floating point Multiplier Accumulator Unit (MAC)☆30Updated 4 years ago
- Xilinx AXI VIP example of use☆40Updated 4 years ago
- A repository for SystemC Learning examples☆68Updated 2 years ago
- ☆35Updated 3 months ago
- ☆66Updated 3 years ago
- 128KB AXI cache (32-bit in, 256-bit out)☆51Updated 4 years ago
- CHIPKIT: An agile, reusable open-source framework for rapid test chip development☆41Updated 5 years ago
- SAURIA (Systolic-Array tensor Unit for aRtificial Intelligence Acceleration) is an open-source Convolutional Neural Network accelerator b…☆46Updated 8 months ago
- An example of using Ramulator as memory model in a cycle-accurate SystemC Design☆50Updated 7 years ago
- Project repo for the POSH on-chip network generator☆46Updated 3 months ago
- Next generation CGRA generator☆112Updated this week