stanford-ppl / spatial-quickstartLinks
Quickstart for Spatial language
☆35Updated 5 years ago
Alternatives and similar repositories for spatial-quickstart
Users that are interested in spatial-quickstart are comparing it to the libraries listed below
Sorting:
- Spatial: "Specify Parameterized Accelerators Through Inordinately Abstract Language"☆286Updated last year
- FPGA-Accelerated Simulation Framework Automatically Transforming Arbitrary RTL☆101Updated 5 years ago
- Chisel/Firrtl execution engine☆153Updated last year
- Spatial: "Specify Parameterized Accelerators Through Inordinately Abstract Language"☆101Updated 6 years ago
- Dynamically Allocated Neural Network Accelerator for the RISC-V Rocket Microprocessor in Chisel☆218Updated 5 years ago
- Floating point modules for CHISEL☆31Updated 11 years ago
- Rigel is a language for describing image processing hardware embedded in Lua. Rigel can compile to Verilog hardware designs for Xilinx FP…☆56Updated 5 years ago
- Provides Spatial with front-end support from popular machine learning frameworks☆34Updated 6 years ago
- Connectal is a framework for software-driven hardware development.☆175Updated 2 years ago
- The Shang high-level synthesis framework☆120Updated 11 years ago
- ☆88Updated 2 years ago
- REAPR (Reconfigurable Engine for Automata Processing) is a general-purpose framework for accelerating automata processing applications su…☆16Updated 6 years ago
- Linear algebra accelerators for RISC-V (published in ICCD 17)☆67Updated 8 years ago
- Software workload management tool for RISC-V based SoC research. This is the default workload management tool for Chipyard and FireSim.☆86Updated last month
- HLS branch of Halide☆79Updated 7 years ago
- Lipsi: Probably the Smallest Processor in the World☆88Updated last year
- Framework for developing and deploying FPGA logic in the cloud as a microservice for web and cloud applications☆208Updated last month
- Rapidly deploy Chisel and Vivado HLS accelerators on Xilinx PYNQ☆34Updated 7 years ago
- ☆24Updated 9 years ago
- ☆110Updated 7 years ago
- Microarchitecture implementation of the decoupled vector-fetch accelerator☆156Updated last year
- Chisel components for FPGA projects☆127Updated 2 years ago
- ReconOS - Operating System for Reconfigurable Hardware☆29Updated 3 years ago
- Python-based hardware modeling framework☆244Updated 6 years ago
- Provides dot visualizations of chisel/firrtl circuits☆122Updated 2 years ago
- ☆82Updated 9 months ago
- Open-Source Posit RISC-V Core with Quire Capability☆66Updated 9 months ago
- Open-source FPGA research and prototyping framework.☆209Updated last year
- ☆11Updated 3 years ago
- Next generation CGRA generator☆115Updated this week