Xilinx / SDSoC_Examples
☆83Updated 4 years ago
Alternatives and similar repositories for SDSoC_Examples:
Users that are interested in SDSoC_Examples are comparing it to the libraries listed below
- SDSoC™ (Software-Defined System-On-Chip) Environment Tutorials☆148Updated 5 years ago
- Xilinx Deep Learning IP☆92Updated 3 years ago
- Formerly known as the 'reVISION Getting Started Guide', the Embedded Reference Platforms User Guide covers the embedded vision reference …☆11Updated 10 months ago
- A Tutorial on Putting High-Level Synthesis cores in PYNQ☆103Updated 6 years ago
- ☆45Updated 4 years ago
- PYNQ, Neural network Language model, Overlay☆105Updated 5 years ago
- FPGA-based ZynqNet CNN accelerator developed by Vivado_HLS☆107Updated 7 years ago
- Premade bitstreams and block designs to complemented the PYNQ overlay tutorial☆39Updated 3 years ago
- Light-weighted neural network inference for object detection on small-scale FPGA board☆91Updated 5 years ago
- This repo is for ECE44x (Fall2015-Spring2016)☆19Updated 7 years ago
- Matrix Operation Library for FPGA https://xilinx.github.io/gemx/☆63Updated 5 years ago
- This project is trying to create a base vitis platform to run with DPU☆47Updated 4 years ago
- A discussion group on Open Source Deep Learning Accelerator, with technical reports and potential hardware/software issues.☆138Updated 7 years ago
- The 1st place winner's source codes for DAC 2018 System Design Contest, FPGA Track☆89Updated 6 years ago
- Caffe to VHDL☆66Updated 4 years ago
- ☆88Updated 4 years ago
- ☆104Updated 5 years ago
- FPGA based acceleration of Convolutional Neural Networks. The project is developed by Verilog for Altera DE5 Net platform.☆177Updated 8 years ago
- Binarized Convolutional Neural Networks on Software-Programmable FPGAs☆303Updated 4 years ago
- A FPGA Based CNN accelerator, following Google's TPU V1.☆132Updated 5 years ago
- SDAccel Development Environment Tutorials☆108Updated 4 years ago
- An Synthesizable Deep Learning Library based on Xilinx High Level Synthesis(HLS) tool☆15Updated 7 years ago
- ☆64Updated 2 years ago
- Board files to build Ultra 96 PYNQ image☆153Updated last month
- ☆116Updated 3 years ago
- Vitis HLS Library for FINN☆189Updated 2 weeks ago
- Open Source Specialized Computing Stack for Accelerating Deep Neural Networks.☆208Updated 5 years ago
- FireSim-NVDLA: NVIDIA Deep Learning Accelerator (NVDLA) Integrated with RISC-V Rocket Chip SoC Running on the Amazon FPGA Cloud☆161Updated 3 years ago
- Design contest for DAC 2018☆17Updated 6 years ago
- This repository contains all the parameters you need to synthesize the AlexNet by using Vivado High Level Synthesis.☆21Updated 6 years ago