Alternatives and similar repositories for SDSoC-Tutorials:

Users that are interested in SDSoC-Tutorials are comparing it to the libraries listed below

• Xilinx / SDSoC_Examples
  ☆83Updated 4 years ago
• drichmond / PYNQ-HLS
  A Tutorial on Putting High-Level Synthesis cores in PYNQ
  ☆104Updated 6 years ago
• Xilinx / Embedded-Reference-Platforms-User-Guide
  Formerly known as the 'reVISION Getting Started Guide', the Embedded Reference Platforms User Guide covers the embedded vision reference …
  ☆11Updated last year
• Xilinx / PYNQ-DL
  Xilinx Deep Learning IP
  ☆92Updated 3 years ago
• pp-Innovate / FPGA-ZynqNet
  FPGA-based ZynqNet CNN accelerator developed by Vivado_HLS
  ☆109Updated 7 years ago
• Xilinx / Vitis-In-Depth-Tutorial
  ☆117Updated 3 years ago
• hillhao / PYNQ-project
  PYNQ, Neural network Language model, Overlay
  ☆106Updated 5 years ago
• Xilinx / PYNQ-ComputerVision
  Computer Vision Overlays on Pynq
  ☆178Updated 5 years ago
• Xilinx / DPU-PYNQ
  DPU on PYNQ
  ☆211Updated last year
• HWAC-DL / hwac_object_tracker
  FPGA accelerated TinyYOLO v2 object detection neural network
  ☆71Updated 6 years ago
• Xilinx / SDAccel-Tutorials
  SDAccel Development Environment Tutorials
  ☆108Updated 4 years ago
• fpgasystems / spooNN
  FPGA-based neural network inference project with an end-to-end approach (from training to implementation to deployment)
  ☆265Updated 5 years ago
• gewuek / vitis_ai_custom_platform_flow
  This project is trying to create a base vitis platform to run with DPU
  ☆47Updated 4 years ago
• Er1cZ / Deploying_CNN_on_FPGA_using_OpenCL
  Squeezenet V1.1 on Cyclone V SoC-FPGA at 450ms/image, 20x faster than ARM A9 processor alone. A project for 2017 Innovate FPGA design con…
  ☆105Updated 6 years ago
• Xilinx / PYNQ-HelloWorld
  This repository contains a "Hello World" introduction application to the Xilinx PYNQ framework.
  ☆101Updated 2 years ago
• Xilinx / QNN-MO-PYNQ
  ☆247Updated 4 years ago
• mtmd / FPGA_Based_CNN
  FPGA based acceleration of Convolutional Neural Networks. The project is developed by Verilog for Altera DE5 Net platform.
  ☆179Updated 8 years ago
• Avnet / bdf
  Avnet Board Definition Files
  ☆132Updated 2 months ago
• ilaydayaman / CNN_for_SLR
  A trained Convolutional Neural Network implemented on ZedBoard Zynq-7000 FPGA.
  ☆92Updated last year
• alan4186 / Hardware-CNN
  A convolutional neural network implemented in hardware (verilog)
  ☆156Updated 7 years ago
• Avnet / Ultra96-PYNQ
  Board files to build Ultra 96 PYNQ image
  ☆154Updated 3 months ago
• Xilinx / finn-hlslib
  Vitis HLS Library for FINN
  ☆191Updated last week
• onioncc / iSmartDNN
  Light-weighted neural network inference for object detection on small-scale FPGA board
  ☆91Updated 5 years ago
• Xilinx / Vitis_Embedded_Platform_Source
  ☆122Updated 3 months ago
• StefanSredojevic / Deep-Neural-Network-Hardware-Accelerator
  SystemVerilog HDL and TB code Deep Neural Network Hardware Accelerator implementation on zybo 7010 FPGA and also C code for Vivado SDK So…
  ☆106Updated 4 years ago
• Xilinx / RFNoC-HLS-NeuralNet
  ☆105Updated 5 years ago
• hirayaku / DAC2018-TGIIF
  The 1st place winner's source codes for DAC 2018 System Design Contest, FPGA Track
  ☆89Updated 6 years ago
• Xilinx / PYNQ-BOT
  ☆27Updated 7 years ago
• amiq-consulting / CNN-using-HLS
  Convolutional Neural Network Using High Level Synthesis
  ☆86Updated 4 years ago
• wbrueckner / cv2pynq
  Python package which accelerates OpenCV image filtering functions for the PYNQ framework
  ☆46Updated 6 years ago