ckchengucsd / ILP-SAT-Detailed-RouterLinks
ILP SAT Detailed Router
☆11Updated 5 years ago
Alternatives and similar repositories for ILP-SAT-Detailed-Router
Users that are interested in ILP-SAT-Detailed-Router are comparing it to the libraries listed below
Sorting:
- ☆33Updated 5 years ago
- DATC Robust Design Flow.☆37Updated 5 years ago
- EDA physical synthesis optimization kit☆59Updated last year
- SMT-based Simultaneous Place-&-Route for Standard Cell Synthesis for PROBE 2.0☆18Updated 4 years ago
- ☆14Updated 4 years ago
- Circuit release of the MAGICAL project☆35Updated 5 years ago
- ☆44Updated 5 years ago
- Workshop on Open-Source EDA Technology (WOSET)☆49Updated 8 months ago
- Source codes and calibration scripts for clock tree synthesis☆40Updated 5 years ago
- Global Router Built for ICCAD Contest 2019☆31Updated 5 years ago
- Open-sourced utilities for initial flow setup, calibration, and other user functions for OpenROAD project☆19Updated 5 years ago
- ☆19Updated last year
- OpenDesign Flow Database☆16Updated 6 years ago
- Runtime-First FPGA Interchange Routing Contest @ FPGA’24☆33Updated last month
- IDEA project source files☆107Updated 8 months ago
- An Open-Source Analytical Placer for Large Scale Heterogeneous FPGAs using Deep-Learning Toolkit☆82Updated 2 months ago
- ☆73Updated last month
- A Fast C++ Header-only Parser for Standard Parasitic Exchange Format (SPEF).☆56Updated 2 years ago
- ☆15Updated 5 years ago
- OpenPiton Design Benchmark☆25Updated 2 years ago
- Delay Calculation ToolKit☆32Updated 2 years ago
- ☆105Updated 5 years ago
- Open Source PHY v2☆29Updated last year
- An Approximate Logic Synthesis Framework based on Boolean Matrix Factorization☆31Updated last year
- CHIPKIT: An agile, reusable open-source framework for rapid test chip development☆41Updated 5 years ago
- Intel's Analog Detailed Router☆39Updated 6 years ago
- C++ header-only exact synthesis library☆17Updated 2 years ago
- A High-performance Timing Analysis Tool for VLSI Systems☆9Updated 4 years ago
- RippleFPGA, A Simultaneous Pack-and-Place Algorithm for UltraScale FPGA☆90Updated 5 years ago
- Material for OpenROAD Tutorial at DAC 2020☆47Updated 2 years ago