ckchengucsd / ILP-SAT-Detailed-RouterLinks
ILP SAT Detailed Router
☆13Updated 5 years ago
Alternatives and similar repositories for ILP-SAT-Detailed-Router
Users that are interested in ILP-SAT-Detailed-Router are comparing it to the libraries listed below
Sorting:
- ☆33Updated 6 years ago
- DATC Robust Design Flow.☆36Updated 6 years ago
- SMT-based Simultaneous Place-&-Route for Standard Cell Synthesis for PROBE 2.0☆18Updated 5 years ago
- EDA physical synthesis optimization kit☆64Updated 2 years ago
- Workshop on Open-Source EDA Technology (WOSET)☆48Updated last year
- A Fast C++ Header-only Parser for Standard Parasitic Exchange Format (SPEF).☆59Updated 3 years ago
- Global Router Built for ICCAD Contest 2019☆34Updated 5 years ago
- Circuit release of the MAGICAL project☆40Updated 6 years ago
- Open Source Detailed Placement engine☆40Updated 6 years ago
- OpenDesign Flow Database☆17Updated 7 years ago
- Delay Calculation ToolKit☆32Updated 3 years ago
- Open-sourced utilities for initial flow setup, calibration, and other user functions for OpenROAD project☆19Updated 6 years ago
- ☆44Updated 6 years ago
- Runtime-First FPGA Interchange Routing Contest @ FPGA’24☆35Updated 7 months ago
- Source codes and calibration scripts for clock tree synthesis☆40Updated 5 years ago
- IDEA project source files☆111Updated 3 months ago
- OpenPiton Design Benchmark☆28Updated 2 years ago
- ☆78Updated 3 weeks ago
- ☆20Updated last year
- An Open-Source Analytical Placer for Large Scale Heterogeneous FPGAs using Deep-Learning Toolkit☆91Updated 8 months ago
- ☆14Updated 5 years ago
- fakeram generator for use by researchers who do not have access to commercial ram generators☆37Updated 3 years ago
- RippleFPGA, A Simultaneous Pack-and-Place Algorithm for UltraScale FPGA☆91Updated 5 years ago
- GPU-based logic synthesis tool☆97Updated 2 months ago
- ☆14Updated 11 months ago
- A LEF/DEF Utility.☆33Updated 6 years ago
- UCSD Detailed Router☆94Updated 5 years ago
- DATC RDF☆50Updated 5 years ago
- ☆42Updated 3 years ago
- AMF-Placer 2.0: An open-source timing-driven analytical mixed-size FPGA placer of heterogeneous resources (LUT/FF/LUTRAM/MUX/CARRY/DSP/BR…☆108Updated last year