MIRALab-USTC / ChiPBenchLinks
ChiPBench:Benchmarking End-to-End Performance of AI-based Chip Placement Algorithms
☆46Updated last month
Alternatives and similar repositories for ChiPBench
Users that are interested in ChiPBench are comparing it to the libraries listed below
Sorting:
- Official implementation of DATE'25 paper "Timing-Driven Global Placement by Efficient Critical Path Extraction".☆55Updated 5 months ago
- This is the code for our paper "Reinforcement Learning within Tree Search for Fast Macro Placement".☆32Updated last year
- ☆66Updated 2 years ago
- REST, a reinforcement learning framework for constructing rectilinear Steiner Minimum tree (RSMT)☆58Updated 3 years ago
- Xplace 3.0: An Extremely Fast, Extensible and Deterministic Placement Framework with Detailed-Routability and Timing Optimization☆142Updated 5 months ago
- Official open source repository for "A Timing Engine Inspired Graph Neural Network Model for Pre-Routing Slack Prediction" (DAC 2022)☆82Updated last year
- ☆31Updated 3 years ago
- ☆62Updated 3 weeks ago
- ☆31Updated 2 years ago
- ☆23Updated last year
- ☆92Updated 4 months ago
- ☆55Updated 5 months ago
- CUGR, VLSI Global Routing Tool Developed by CUHK☆138Updated 2 years ago
- Artificial Netlist Generator☆44Updated last year
- This GitHub repo is for the OpenROAD and CircuitOps Tutorial at ASP-DAC 2024☆52Updated 10 months ago
- Macro Placement - benchmarks, evaluators, and reproducible results from leading methods in open source☆287Updated 2 months ago
- 🕹 OpenPARF: An Open-Source Placement and Routing Framework for Large-Scale Heterogeneous FPGAs with Deep Learning Toolkit☆160Updated 6 months ago
- Simple Python interface for ABC☆25Updated 2 years ago
- Implementations of DeepPlace, PRNet, HubRouter, PreRoutGNN, FlexPlanner and DSBRouter.☆280Updated last month
- ☆94Updated 3 months ago
- The release for ICML 2023 paper☆47Updated last year
- Official implementation of paper "Open3DBench: Open-Source Benchmark for 3D-IC Backend Implementation and PPA Evaluation".☆66Updated 5 months ago
- Dr. CU, VLSI Detailed Routing Tool Developed by CUHK☆138Updated 2 years ago
- ☆76Updated 5 months ago
- Analog IC symmetry extraction benchmark of AncstrGNN☆10Updated last year
- Reimplementation of the VLSI placement algorithm: ePlace and ePlace-MS☆53Updated last year
- Must-read papers on Graph Neural Networks (GNNs) for Integrated Circuits (ICs) design, security and reliability.☆69Updated 4 months ago
- OpenABC-D is a large-scale labeled dataset generated by synthesizing open source hardware IPs. This dataset can be used for various graph…☆136Updated 3 months ago
- ☆35Updated 4 years ago
- This is a deep-learning based model for Electronic Design Automation(EDA), predicting the IR drop location on the chip.☆33Updated 2 years ago