[ICML 2023] ChiPFormer: Transferable Chip Placement via Offline Decision Transformer
☆54Feb 22, 2026Updated last week
Alternatives and similar repositories for ChiPFormer
Users that are interested in ChiPFormer are comparing it to the libraries listed below
Sorting:
- This is the code for our paper "Reinforcement Learning within Tree Search for Fast Macro Placement".☆34Nov 13, 2024Updated last year
- [NeurIPS 2022 Spotlight] MaskPlace: Fast Chip Placement via Reinforced Visual Representation Learning☆68Jan 5, 2026Updated 2 months ago
- Official implementation of NeurIPS'23 paper "Macro Placement by Wire-Mask-Guided Black-Box Optimization"☆30May 23, 2025Updated 9 months ago
- Official implementation of NeurIPS'24 paper "Reinforcement Learning Policy as Macro Regulator Rather than Macro Placer".☆19Aug 13, 2025Updated 6 months ago
- ChiPBench:Benchmarking End-to-End Performance of AI-based Chip Placement Algorithms☆52Sep 22, 2025Updated 5 months ago
- Implementations of DeepPlace, PRNet, HubRouter, PreRoutGNN, FlexPlanner and DSBRouter.☆291Nov 23, 2025Updated 3 months ago
- ☆17May 18, 2024Updated last year
- ☆17Jul 2, 2024Updated last year
- [NeurIPS 2024 Spotlight] Scalable and Effective Arithmetic Tree Generation for Adder and Multiplier Designs☆15Feb 22, 2026Updated last week
- ☆21Dec 1, 2025Updated 3 months ago
- ☆14Oct 25, 2023Updated 2 years ago
- [ICML 2023] Official code for "DevFormer: A Symmetric Transformer for Context-Aware Device Placement"☆20Dec 7, 2024Updated last year
- Xplace 3.0: An Extremely Fast, Extensible and Deterministic Placement Framework with Detailed-Routability and Timing Optimization☆156Jan 16, 2026Updated last month
- ☆158Jul 12, 2023Updated 2 years ago
- ☆19Nov 29, 2022Updated 3 years ago
- ☆31Oct 12, 2023Updated 2 years ago
- Deep learning toolkit-enabled VLSI placement☆947Feb 19, 2026Updated 2 weeks ago
- RTL-to-Vector-to-GDS☆67Dec 5, 2025Updated 3 months ago
- This is a deep-learning based model for Electronic Design Automation(EDA), predicting the congestion location.☆24Aug 28, 2024Updated last year
- [NeurIPS 2023] CircuitFormer: Circuit as Set of Points☆38Nov 22, 2023Updated 2 years ago
- Mirror of the Si2 LEF/DEF parser (v5.8)☆19Oct 8, 2021Updated 4 years ago
- Macro placement tool for OpenROAD flow☆25Aug 13, 2020Updated 5 years ago
- Official open source repository for "A Timing Engine Inspired Graph Neural Network Model for Pre-Routing Slack Prediction" (DAC 2022)☆90Aug 22, 2024Updated last year
- Source code and datasets for Circuit Design Completion using GNNs paper☆10Jan 26, 2023Updated 3 years ago
- Artificial Netlist Generator☆46Mar 19, 2024Updated last year
- Awesome Artificial Intelligence for Electronic Design Automation Papers.☆193Dec 28, 2023Updated 2 years ago
- CircuitNet: An Open-Source Dataset for Machine Learning Applications in Electronic Design Automation (EDA)☆451Jul 17, 2025Updated 7 months ago
- ☆1,603Feb 11, 2026Updated 3 weeks ago
- One-Pixel Shortcut: on the Learning Preference of Deep Neural Networks (ICLR 2023 Spotlight)☆14Sep 28, 2025Updated 5 months ago
- Github repository of the AIStats 2024 paper: DE-HNN: An effective neural model for Circuit Netlist representation☆14Sep 3, 2025Updated 6 months ago
- iccad contest 2022 problem B☆16Sep 4, 2022Updated 3 years ago
- LLM-Enhanced Bayesian Optimization for Efficient Analog Constraint Generation☆30Oct 28, 2024Updated last year
- Official implementation of DATE'25 paper "Timing-Driven Global Placement by Efficient Critical Path Extraction".☆62Jun 14, 2025Updated 8 months ago
- ☆83Jan 5, 2026Updated 2 months ago
- SpecLLM: Exploring Generation and Review of VLSI Design Specification with Large Language Model☆15Jan 29, 2024Updated 2 years ago
- Public repository for Task 6 of OpenROAD project. ML-based PDN synthesis and optimization.☆36Jul 6, 2023Updated 2 years ago
- AutoCellLibX: Automated Standard Cell Library Extension Based on Pattern Mining☆18Nov 1, 2022Updated 3 years ago
- ☆99Jun 24, 2025Updated 8 months ago
- Applying Deep Q-learning for Global Routing☆130Sep 15, 2020Updated 5 years ago