Verification environment for the OpenHW Group's CORE-V High Performance Data Cache controller.
☆28Jan 6, 2026Updated 7 months ago
Alternatives and similar repositories for cv-hpdcache-verif
Users that are interested in cv-hpdcache-verif are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- ☆16May 25, 2026Updated 2 months ago
- UVM components for DSP tasks (MODulation/DEModulation)☆16Mar 2, 2022Updated 4 years ago
- Functional Verification the MMU (Memory Management Unit) of a multiprocessor with Data Cache and Instruction Cache☆14Nov 9, 2015Updated 10 years ago
- AXI Verification using UVM Testbench☆16Oct 20, 2024Updated last year
- RTL sources of the High-Performance L1 Dcache (HPDcache) for OpenHW CV cores☆111Jul 28, 2026Updated 3 weeks ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- UVM Verification Environment for the CVFPU☆23Aug 11, 2026Updated last week
- ☆26Jul 22, 2026Updated 3 weeks ago
- Design and UVM-TB of RISC -V Microprocessor☆36Jun 27, 2024Updated 2 years ago
- CORE-V MCU UVM Environment and Test Bench☆27Jul 19, 2024Updated 2 years ago
- PCIe System Verilog Verification Environment developed for PCIe course☆16Mar 26, 2024Updated 2 years ago
- The official NaplesPU hardware code repository☆36Jul 27, 2019Updated 7 years ago
- ☆15Nov 11, 2015Updated 10 years ago
- RTL for AXI over UCIe bridge.☆27Aug 10, 2026Updated last week
- Simple AMBA VIP, Include axi/ahb/apb☆35Jul 4, 2024Updated 2 years ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- GEMM and GEMM-Ops accelerator for PULP systems☆115Aug 5, 2026Updated last week
- Functional Verification of Physical Layer of PCI Express Gen5.0 Graduation Project Using UVM☆34Jul 17, 2025Updated last year
- Verification Template Engine is a Jinja2-based template engine targeted at verification engineers☆14Jan 4, 2024Updated 2 years ago
- A Verification Platform for UDP Protocol Ethernet Module wrapped with AXI and APB bus based on UVM☆32Jun 1, 2022Updated 4 years ago
- SystemVerilog Functional Coverage for RISC-V ISA☆36Dec 11, 2025Updated 8 months ago
- This is a brand new implement of GPGPU called Koala GPU which will be compatible with NV GPU micro architecture starting from fermi. It s…☆18May 31, 2026Updated 2 months ago
- A UVM verification with a APB BFM (Bus functional model), connected to two write-only DAC and two read-only ADC slaves. The sequence gene…☆17Jul 7, 2018Updated 8 years ago
- An Open-Source Design and Verification Environment for RISC-V☆90Apr 21, 2021Updated 5 years ago
- Verification of an Asynchronous FIFO using UVM & SVA☆13Jun 26, 2025Updated last year
- End-to-end encrypted cloud storage - Proton Drive • AdSpecial offer: 40% Off Yearly / 80% Off First Month. Protect your most important files, photos, and documents from prying eyes.
- ☆18Jul 3, 2025Updated last year
- Assertion-Based Formal Verification of an AHB2APB bridge, featuring SystemVerilog assertions, RTL designs, and detailed documentation inc…☆37Mar 23, 2024Updated 2 years ago
- List of several designs I have been working through the years to avoid re-designing it again☆16Jun 17, 2024Updated 2 years ago
- ☆12May 31, 2016Updated 10 years ago
- RISC-V Verification Interface☆158Jun 11, 2026Updated 2 months ago
- Single Cycle CPU using the RV32I Base Instruction set☆23Nov 5, 2025Updated 9 months ago
- OpenExSys_CoherentCache a directory-based MESI protocol coherent cache IP.☆25Mar 25, 2025Updated last year
- ☆22Sep 26, 2025Updated 10 months ago
- ☆60May 22, 2026Updated 2 months ago
- GPUs on demand by Runpod - Special Offer Available • AdRun AI, ML, and HPC workloads on powerful cloud GPUs—without limits or wasted spend. Deploy GPUs in under a minute and pay by the second.
- Open-source Neural Processing Unit (NPU) from China ❤☆53Jan 29, 2025Updated last year
- Structured UVM Course☆76Jan 4, 2024Updated 2 years ago
- Technology dependent cells instantiated in the design for generic process (simulation, FPGA)☆96Jul 22, 2026Updated 3 weeks ago
- The CORE-V CVA5 is an Application class 5-stage RISC-V CPU specifically targetting FPGA implementations.☆137Jul 11, 2025Updated last year
- APB master and slave developed in RTL.☆27Oct 25, 2025Updated 9 months ago
- Artifacts for the SCVP lecture☆12Nov 17, 2021Updated 4 years ago
- The official repository for the gem5 computer-system architecture simulator.☆15Updated this week