Alternatives and similar repositories for panic_with_cocotb

Users that are interested in panic_with_cocotb are comparing it to the libraries listed below

• utnslab / RingleaderNIC
  ☆14Updated 2 years ago
• maswx / vu13p_corundum
  corundum work on vu13p
  ☆19Updated last year
• pgroupATusc / fasthash
  Source Code for the paper Titled FASTHash: FPGA-Based High Throughput Parallel Hash Table published in ISC high performance 2020
  ☆25Updated 3 years ago
• l-nic / chipyard
  An Agile Chisel-Based SoC Design Framework
  ☆27Updated 3 years ago
• NetFPGA / NetFPGA-PLUS
  ☆52Updated 11 months ago
• ucsdsysnet / Rosebud
  Framework for FPGA-accelerated Middlebox Development
  ☆44Updated 2 years ago
• programmable-scheduling / pifo-hardware
  ☆33Updated 9 years ago
• minmit / tonic
  A Programmable Hardware Architecture for Network Transport Logic
  ☆35Updated 3 years ago
• UCLA-VAST / HT-Deflate-FPGA
  ☆15Updated 3 years ago
• Krishnaps / Gem5-PCI-Express
  Gem5 with PCI Express integrated.
  ☆18Updated 6 years ago
• acsl-technion / nica
  An infrastructure for inline acceleration of network applications
  ☆30Updated 3 years ago
• lizardll / ScalaBFS
  A Scalable BFS Accelerator on FPGA-HBM Platform
  ☆13Updated 3 years ago
• Xilinx / pcie_qdma_ats_example
  ☆24Updated 4 years ago
• mohsaied / rtl2booksim
  Network-on-Chip simulator (Booksim) with hooks for co-simulating RTL designs in Verilog.
  ☆20Updated 9 years ago
• suchandler96 / gem5-NVDLA
  ☆31Updated 2 months ago
• OSU-STARLAB / GPGPU-Ramulator-Simulator
  Replace original DRAM model in GPGPU-sim with Ramulator DRAM model
  ☆18Updated 6 years ago
• barabanshek / Dagger
  HW/SW co-designed end-host RPC stack
  ☆20Updated 3 years ago
• RC4ML / FpgaNIC
  FpgaNIC is an FPGA-based Versatile 100Gb SmartNIC for GPUs [ATC 22]
  ☆128Updated last year
• Xilinx / open-nic-dpdk
  DPDK Drivers for AMD OpenNIC
  ☆26Updated last year
• Liu-Cheng / cycle-accurate-SystemC-simulator-over-ramulator
  An example of using Ramulator as memory model in a cycle-accurate SystemC Design
  ☆50Updated 7 years ago
• pcie-bench / pcie-model
  ☆63Updated 4 months ago
• AlessandroCilardo / NaplesPU
  The official NaplesPU hardware code repository
  ☆16Updated 5 years ago
• SFU-HiAccel / uBench
  [FPGA'21] Microbenchmarks for Demystifying the Memory System of Modern Datacenter FPGAs for Software Programmers
  ☆31Updated 3 years ago
• CMU-SAFARI / MIG-7-PHY-DDR3-Controller
  A DDR3 Controller that uses the Xilinx MIG-7 PHY to interface with DDR3 devices.
  ☆11Updated 3 years ago
• zslwyuan / PAAS_V1.0
  PAAS: A System Level Simulator for Heterogeneous (CPU-FPGA) Computing Systems
  ☆43Updated 3 years ago
• gthparch / HBM
  High Bandwidth Memory (HBM) timing model based on DRAMSim2
  ☆42Updated 7 years ago
• PolyArch / dsagen2
  Domain-Specific Architecture Generator 2
  ☆21Updated 2 years ago
• SwarmArch / sim
  ordspecsim: The Swarm architecture simulator
  ☆24Updated 2 years ago
• fmalazemi / Garnet2.0_tutorial
  A short tutorial on Gem5 with focus on how to run and modify Garnet2.0
  ☆17Updated 7 years ago
• ETH-PLUS / Jingzhao
  ☆65Updated this week