Alternatives and similar repositories for ventus-gpgpu-doc:

Users that are interested in ventus-gpgpu-doc are comparing it to the libraries listed below

• THU-DSP-LAB / ventus-gpgpu-cpp-simulator
  Cycle-accurate C++ & SystemC simulator for the RISC-V GPGPU Ventus
  ☆25Updated last week
• THU-DSP-LAB / ventus-gpgpu-isa-simulator
  Ventus GPGPU ISA Simulator Based on Spike
  ☆43Updated last week
• plctlab / rvv-benchmark
  PLCT实验室 rvv-llvm 实现配套的 benchmark / testcases
  ☆22Updated 4 years ago
• soDLA-publishment / somnia
  Learn NVDLA by SOMNIA
  ☆33Updated 5 years ago
• THU-DSP-LAB / llvm-project
  LLVM OpenCL C compiler suite for ventus GPGPU
  ☆43Updated last week
• zeasa / nvdla-compiler
  ☆44Updated 5 years ago
• natu4u / GSOC_TensorCore
  TensorCore Vector Processor for Deep Learning - Google Summer of Code Project
  ☆21Updated 3 years ago
• meton-robean / Vector_MulAdd_Accelerator
  vector multiplication adder accelerator (using chisel 3 and RocketChip RoCC ) 向量乘法累加加速器
  ☆51Updated 5 years ago
• riscv-stc / riscv-matrix-spec
  RISC-V Matrix Specification
  ☆21Updated 4 months ago
• maeri-project / MAERI_bsv
  MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)
  ☆64Updated 3 years ago
• plctlab / plct-gem5
  upstream: https://github.com/RALC88/gem5
  ☆31Updated last year
• jinhachung / tptpu-sim
  A Toy-Purpose TPU Simulator
  ☆18Updated 10 months ago
• suchandler96 / gem5-NVDLA
  ☆29Updated 2 weeks ago
• ic-lab-duth / NoCpad
  HLS for Networks-on-Chip
  ☆34Updated 4 years ago
• mnnuahg / StamicCGRA
  A static dataflow CGRA with dynamic dataflow execution capability
  ☆10Updated 3 years ago
• microdynamics-cpu / tree-core-cpu
  A series of RISC-V soft core processor written from scratch. Now, we're using all open-source toolchain (chisel, mill, verilator, NEMU, …
  ☆38Updated last year
• harvard-acc / FlexASR
  FlexASR: A Reconfigurable Hardware Accelerator for Attention-based Seq-to-Seq Networks
  ☆42Updated last month
• THU-DSP-LAB / ventus-gpgpu-verilog
  GPGPU supporting RISCV-V, developed with verilog HDL
  ☆92Updated last month
• OSCPU / chisel-playground
  ☆64Updated 2 months ago
• Jerc007 / Open-GPGPU-FlexGrip-
  FlexGripPlus: an open-source GPU model for reliability evaluation and micro architectural simulation
  ☆99Updated last year
• jiaaom / HPDLA
  Systolic-array based Deep Learning Accelerator generator
  ☆24Updated 4 years ago
• GramThanos / CPU-on-Vivado-HLS
  A simple MIPS-like CPU demo in C++ for Xilinx Vivado HLS
  ☆18Updated 5 years ago
• stillwater-sc / RISC-V-TensorCore
  Transactional Verilog design and Verilator Testbench for a RISC-V TensorCore Vector co-processor for reproducible linear algebra
  ☆51Updated 3 years ago
• WuDan0399 / Integrate-NVDLA-and-TVM
  ☆30Updated 2 years ago
• amin-norollah / PAT-Noxim
  cycle accurate Network-on-Chip Simulator
  ☆27Updated last year
• XUANTIE-RV / riscv-matrix-extension-spec
  A matrix extension proposal for AI applications under RISC-V architecture
  ☆137Updated 2 months ago
• chenhaoc / cnnhwpe
  ☆65Updated 2 years ago
• lshpku / gem5-fs-handbook
  gem5 FS模式实验手册
  ☆35Updated 2 years ago
• cornell-zhang / HiSparse
  High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS
  ☆90Updated 6 months ago
• TeCSAR-UNCC / gem5-SALAM
  ☆91Updated last year