SoC Based on ARM Cortex-M3
☆37May 16, 2025Updated 10 months ago
Alternatives and similar repositories for AhaM3SoC
Users that are interested in AhaM3SoC are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Raptor is an SoC Design Template based on Arm Cortex M0 or M3 core.☆22Oct 9, 2019Updated 6 years ago
- Various low power labs using sky130☆13Sep 3, 2021Updated 4 years ago
- A Direct Memory Access Controller (DMAC) with AHB-lite bus interface☆17Oct 6, 2024Updated last year
- UVM components for DSP tasks (MODulation/DEModulation)☆15Mar 2, 2022Updated 4 years ago
- The open- MSP430 is an open-source 16-bit microcontroller core written in Verilog, that is compatible with the Texas Instruments MSP430 m…☆18Jan 28, 2022Updated 4 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click and start building anything your business needs.
- ☆14Jun 30, 2019Updated 6 years ago
- Fast PnR toolchain for CGRA☆18Jul 26, 2024Updated last year
- Very simple Cortex-M1 SoC design based on ARM DesignStart☆18Jan 25, 2022Updated 4 years ago
- Synopsys Design compiler, VCS and Tetra-MAX☆19May 29, 2018Updated 7 years ago
- Step by step tutorial for building CortexM0 SoC☆39Mar 29, 2022Updated 4 years ago
- soc integration script and integration smoke script☆24Sep 12, 2022Updated 3 years ago
- ☆21Mar 27, 2026Updated last week
- Small and simple, primitive SoC with GPU, CPU, RAM, GPIO☆14Dec 29, 2016Updated 9 years ago
- ☆14Feb 24, 2025Updated last year
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- An out-of-order, dual issueed RISC-V core and SOC, a working project.☆10Apr 24, 2023Updated 2 years ago
- System on Chip verified with UVM/OSVVM/FV☆34Feb 28, 2026Updated last month
- The PE for the second generation CGRA (garnet).☆18Feb 22, 2026Updated last month
- Hand Writing Digital Recognization Based on FPGA, we desiged a SoC embeded a Cortex M3 core and other peripherals，this SoC run a CNN. The…☆13Mar 30, 2023Updated 3 years ago
- Simple AMBA VIP, Include axi/ahb/apb☆32Jul 4, 2024Updated last year
- MMC小组开发的一个基于Cortex-M0的ARM处理器核的无线SOC设计☆22May 24, 2023Updated 2 years ago
- The RTL source for AnyCore RISC-V☆33Mar 18, 2022Updated 4 years ago
- This is a tutorial on standard digital design flow☆85May 24, 2021Updated 4 years ago
- Direct Access Memory for MPSoC☆13Feb 28, 2026Updated last month
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- Arm Cortex-M0 based Customizable SoC for IoT Applications☆16Nov 4, 2020Updated 5 years ago
- Functional Verification the MMU (Memory Management Unit) of a multiprocessor with Data Cache and Instruction Cache☆13Nov 9, 2015Updated 10 years ago
- A configurable general purpose graphics processing unit for☆12May 18, 2019Updated 6 years ago
- RiscSoC 是一个芯片集成项目，包含了 Cortex-M0、Cortex-M3、MIPS、RISC-V、4-BIT 等内核的 SoC 集成，部分 SoC 使用的自己设计的内核☆12Apr 26, 2022Updated 3 years ago
- Linux-capable superscalar out-of-order RISC core (with Cache& MMU) and SoC, having been verified on Xilinx Kintex-7 FPGA.☆55Aug 14, 2024Updated last year
- UVM resource from github, run simulation use YASAsim flow☆33Apr 25, 2020Updated 5 years ago
- AMBA bus generator including AXI4, AXI3, AHB, and APB☆241Jul 16, 2023Updated 2 years ago
- Next generation CGRA generator☆119Mar 26, 2026Updated last week
- Andes Vector Extension support added to riscv-dv☆18May 29, 2020Updated 5 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting with the flexibility to host WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Cloudways by DigitalOcean.
- EasierUVM from Doulos now written in Python for easier UVM with framework and template generator☆13Sep 28, 2022Updated 3 years ago
- Implementation of the pipelined RISC V processor with many useful features as fully bypassing, dynamic branch prediction, single and mult…☆18Feb 12, 2024Updated 2 years ago
- AXI4 with a FIFO integrated with VIP☆22Feb 29, 2024Updated 2 years ago
- Cortex M0 based SoC☆76Sep 9, 2021Updated 4 years ago
- Theia: ray graphic processing unit☆20Jul 17, 2014Updated 11 years ago
- SystemVerilog overhaul of ESP L2 and LLC caches with directory based protocol☆18Feb 27, 2025Updated last year
- ☆12Nov 11, 2015Updated 10 years ago