A Direct Memory Access Controller (DMAC) with AHB-lite bus interface
☆17Oct 6, 2024Updated last year
Alternatives and similar repositories for MS_DMAC_AHBL
Users that are interested in MS_DMAC_AHBL are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- MMC小组开发的一个基于Cortex-M0的ARM处理器核的无线SOC设计☆22May 24, 2023Updated 2 years ago
- Raptor is an SoC Design Template based on Arm Cortex M0 or M3 core.☆22Oct 9, 2019Updated 6 years ago
- AHB/APB SRAM Inf, VCS&Verdi Sim.☆16Jun 20, 2022Updated 3 years ago
- Direct Access Memory for MPSoC☆13Feb 28, 2026Updated last month
- practice configure AHB-Lite bus protocol☆19Mar 11, 2019Updated 7 years ago
- Proton VPN Special Offer - Get 70% off • AdSpecial partner offer. Trusted by over 100 million users worldwide. Tested, Approved and Recommended by Experts.
- ☆20Nov 18, 2022Updated 3 years ago
- SoC Based on ARM Cortex-M3☆37May 16, 2025Updated 10 months ago
- A simple spidergon network-on-chip with wormhole switching feature☆12Mar 22, 2021Updated 5 years ago
- Universal Asynchronous Receiver/Transmitter (UART) with FIFOs Soft IP☆15Feb 18, 2025Updated last year
- An 8 input interrupt controller written in Verilog.☆28Mar 22, 2012Updated 14 years ago
- 【2022集创赛】Arm杯一等奖作品：Cortex-M0智能娱乐收音机 开源项目☆27Mar 21, 2023Updated 3 years ago
- ☆38Aug 12, 2015Updated 10 years ago
- ☆21Sep 26, 2025Updated 6 months ago
- DSP WishBone Compatible Cores☆14Jul 17, 2014Updated 11 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click and start building anything your business needs.
- Verification IP for Watchdog☆12Apr 6, 2021Updated 5 years ago
- Designed a pipelined calculation engine to read input/weights of neuron and compute/store results in SystemVerilog. Implemented fabric to…☆12Feb 12, 2019Updated 7 years ago
- Various low power labs using sky130☆13Sep 3, 2021Updated 4 years ago
- ☆12Mar 10, 2023Updated 3 years ago
- Extending BookSim2.0 and HotSpot6.0 for Power, Performance and Thermal evaluation of 3D NoC Architectures☆13Aug 9, 2019Updated 6 years ago
- AHB-lite, AHB-APB bridge and extended APB side architecture in SystemVerilog☆18Sep 2, 2023Updated 2 years ago
- ☆20Aug 22, 2022Updated 3 years ago
- IC Verification & SV Demo☆58Sep 29, 2021Updated 4 years ago
- ☆14Jun 30, 2019Updated 6 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting with the flexibility to host WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Cloudways by DigitalOcean.
- UVM Testbench for synchronus fifo☆19Aug 28, 2020Updated 5 years ago
- Ratatoskr NoC Simulator☆29Apr 13, 2021Updated 4 years ago
- ☆18Apr 5, 2015Updated 11 years ago
- SystemVerilog files for lab project on a DNN hardware accelerator☆18Jun 22, 2021Updated 4 years ago
- ☆16Apr 21, 2019Updated 6 years ago
- ☆29Oct 20, 2019Updated 6 years ago
- ☆19Aug 11, 2022Updated 3 years ago
- AXI4 with a FIFO integrated with VIP☆23Feb 29, 2024Updated 2 years ago
- Digital Standard Cells based SAR ADC☆15Aug 5, 2021Updated 4 years ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- this is an AHB to APB bridge with Synopsys VIP based test enviroment. RTL can be found from UVM website.☆19Jul 29, 2014Updated 11 years ago
- A 16-bit RISC-V Inspired ISA☆23Jul 19, 2025Updated 8 months ago
- Arm Cortex-M0 based Customizable SoC for IoT Applications☆16Nov 4, 2020Updated 5 years ago
- 在Dimsmary/Dactyl-HelloWord的基础上做一些小改进☆15Nov 15, 2024Updated last year
- ☆16Jun 22, 2023Updated 2 years ago
- Verilog code that does 2D Low Pass Filter on a greyscale image☆10Sep 22, 2015Updated 10 years ago
- Attempt to setup a bridge between AHB and I2C by constructing dedicated modules of AHB master , AHB slave , APB master , APB slave, I2C m…☆22Feb 25, 2019Updated 7 years ago