ABKGroup / NanGate45-Synopsys-EnablementLinks
☆29Updated 4 months ago
Alternatives and similar repositories for NanGate45-Synopsys-Enablement
Users that are interested in NanGate45-Synopsys-Enablement are comparing it to the libraries listed below
Sorting:
- The first version of TritonPart☆31Updated 2 years ago
- Collection of digital hardware modules & projects (benchmarks)☆79Updated last month
- AMF-Placer 2.0: An open-source timing-driven analytical mixed-size FPGA placer of heterogeneous resources (LUT/FF/LUTRAM/MUX/CARRY/DSP/BR…☆109Updated last year
- Official implementation of paper "Open3DBench: Open-Source Benchmark for 3D-IC Backend Implementation and PPA Evaluation".☆78Updated 7 months ago
- ☆42Updated 3 years ago
- MasterRTL: A Pre-Synthesis PPA Estimation Framework for Any RTL Design☆66Updated 8 months ago
- Artificial Netlist Generator☆46Updated last year
- reference block design for the ASAP7nm library in Cadence Innovus☆56Updated last year
- A Logic Synthesis tool based on "Mockturtle: EPFL Logic Synthesis Library " and "ABC: System for Sequential Logic Synthesis and Formal Ve…☆39Updated last month
- Official open source repository for "A Timing Engine Inspired Graph Neural Network Model for Pre-Routing Slack Prediction" (DAC 2022)☆88Updated last year
- 🕹 OpenPARF: An Open-Source Placement and Routing Framework for Large-Scale Heterogeneous FPGAs with Deep Learning Toolkit☆169Updated 9 months ago
- A collection of ISCAS,ITC,TAU and other Benchmark Circuits for EDA tool evaluation.☆61Updated last year
- GPU-based logic synthesis tool☆97Updated 2 months ago
- An Open-Source Analytical Placer for Large Scale Heterogeneous FPGAs using Deep-Learning Toolkit☆91Updated 9 months ago
- Xplace 3.0: An Extremely Fast, Extensible and Deterministic Placement Framework with Detailed-Routability and Timing Optimization☆154Updated 2 weeks ago
- ☆40Updated 4 years ago
- ☆27Updated last year
- ☆50Updated 2 years ago
- Rsyn – An Extensible Physical Synthesis Framework☆137Updated last year
- EPFL logic synthesis benchmarks☆226Updated 2 months ago
- ☆46Updated last year
- CUGR, VLSI Global Routing Tool Developed by CUHK☆142Updated 2 years ago
- ISPD26 Contest: Post-Placement Buffering and Sizing☆27Updated this week
- Reimplementation of the VLSI placement algorithm: ePlace and ePlace-MS☆54Updated last year
- ☆30Updated last year
- ☆93Updated 7 months ago
- IDEA project source files☆111Updated 3 months ago
- ☆232Updated 10 months ago
- Dataset for ML-guided Accelerator Design☆43Updated last year
- This GitHub repo is for the OpenROAD and CircuitOps Tutorial at ASP-DAC 2024☆54Updated last year