Alternatives and similar repositories for ece5960-physical-design

Users that are interested in ece5960-physical-design are comparing it to the libraries listed below

• ABKGroup / TritonPart
  The first version of TritonPart
  ☆27Updated last year
• ispras / hdl-benchmarks
  Collection of digital hardware modules & projects (benchmarks)
  ☆59Updated last month
• zslwyuan / AMF-Placer
  AMF-Placer 2.0: An open-source timing-driven analytical mixed-size FPGA placer of heterogeneous resources (LUT/FF/LUTRAM/MUX/CARRY/DSP/BR…
  ☆105Updated last year
• cuhk-eda / CULS
  GPU-based logic synthesis tool
  ☆81Updated 11 months ago
• cuhk-eda / GCS-Timer
  ☆22Updated last week
• zshi0616 / python-deepgate
  ☆22Updated last year
• hkust-zhiyao / MasterRTL
  MasterRTL: A Pre-Synthesis PPA Estimation Framework for Any RTL Design
  ☆50Updated 3 weeks ago
• rachelselinar / DREAMPlaceFPGA
  An Open-Source Analytical Placer for Large Scale Heterogeneous FPGAs using Deep-Learning Toolkit
  ☆82Updated last month
• santoshsmalagi / Benchmarks
  A collection of ISCAS,ITC,TAU and other Benchmark Circuits for EDA tool evaluation.
  ☆49Updated 5 months ago
• Yu-Maryland / Verilog-to-PyG
  ☆25Updated last year
• lamda-bbo / Open3DBench
  Official implementation of paper "Open3DBench: Open-Source Benchmark for 3D-IC Backend Implementation and PPA Evaluation".
  ☆30Updated 2 weeks ago
• The-OpenROAD-Project / DAC-2020-Tutorial
  Material for OpenROAD Tutorial at DAC 2020
  ☆47Updated 2 years ago
• Yu-Maryland / Gamora
  Gamora: Graph Learning based Symbolic Reasoning for Large-Scale Boolean Networks (DAC'23)
  ☆50Updated 5 months ago
• cuhk-eda / Xplace
  Xplace 3.0: An Extremely Fast, Extensible and Deterministic Placement Framework with Detailed-Routability and Timing Optimization
  ☆127Updated last week
• ASU-VDA-Lab / 2024_ICCAD_Contest_Gate_Sizing_Benchmark
  ☆23Updated 7 months ago
• ABKGroup / TritonRoute-WXL
  ☆30Updated 4 years ago
• Centre-for-Hardware-Security / asap7_reference_design
  reference block design for the ASAP7nm library in Cadence Innovus
  ☆44Updated last year
• UT-LCA / ML4Accel-Dataset
  Dataset for ML-guided Accelerator Design
  ☆37Updated 7 months ago
• daeyeon22 / artificial_netlist_generator
  Artificial Netlist Generator
  ☆39Updated last year
• zshi0616 / DeepGate2
  ☆28Updated last year
• hkust-zhiyao / PANDA
  PANDA: Architecture-Level Power Evaluation by Unifying Analytical and Machine Learning Solutions
  ☆16Updated last year
• ASU-VDA-Lab / ASP-DAC24-Tutorial
  This GitHub repo is for the OpenROAD and CircuitOps Tutorial at ASP-DAC 2024
  ☆50Updated 5 months ago
• panhomyoung / phyLS
  A Logic Synthesis tool based on "Mockturtle: EPFL Logic Synthesis Library " and "ABC: System for Sequential Logic Synthesis and Formal Ve…
  ☆28Updated this week
• zslwyuan / AutoCellLibX
  AutoCellLibX: Automated Standard Cell Library Extension Based on Pattern Mining
  ☆15Updated 2 years ago
• pnnl / soda-opt
  ☆45Updated 3 weeks ago
• NVlabs / CircuitOps
  ☆81Updated 2 months ago
• scale-lab / OpenPhySyn
  EDA physical synthesis optimization kit
  ☆58Updated last year
• aolofsson / IDEA
  ☆33Updated 5 years ago
• geochrist / dctk
  Delay Calculation ToolKit
  ☆31Updated 2 years ago
• ieee-ceda-datc / datc-rdf-Metrics4ML
  ☆31Updated 3 years ago