IA-C-Lab-Fudan / Chisel-FFT-generator
FFT generator using Chisel
☆58Updated 3 years ago
Alternatives and similar repositories for Chisel-FFT-generator:
Users that are interested in Chisel-FFT-generator are comparing it to the libraries listed below
- An AXI4 crossbar implementation in SystemVerilog☆138Updated last month
- INT8 & FP16 multiplier accumulator (MAC) design with UVM verification completed.☆93Updated 4 years ago
- A 16-point radix-4 FFT chip, including Verilog codes, netlists and layout. Group project.☆60Updated 7 months ago
- AXI DMA 32 / 64 bits☆109Updated 10 years ago
- AXI总线连接器☆96Updated 4 years ago
- A verilog implementation for Network-on-Chip☆73Updated 7 years ago
- Source code of the paper "Low-Cost and Programmable CRC Implementation based on FPGA"☆42Updated 4 years ago
- 3×3脉动阵列乘法器☆43Updated 5 years ago
- Translated SpinalHDL-Doc(v1.7.2) into Chinese☆48Updated last year
- a hardware design library based on SpinalHDL, especially for stream processing operators on Xilinx FPGAs for Arithmetic, DSP, Communicati…☆59Updated last year
- HDL code for a DDR4 memory controller implementing an Open Page Policy and Out of Order execution.☆73Updated 7 years ago
- AMBA bus generator including AXI, AHB, and APB☆98Updated 3 years ago
- AXI4 and AXI4-Lite interface definitions☆93Updated 4 years ago
- HDLGen is an HDL generation tool, supporting embedded Perl or Python script, reduce manual work & improve effiency with a few embedded f…☆92Updated last year
- ☆71Updated 10 years ago
- ☆31Updated 5 years ago
- 16-bit Adder Multiplier hardware on Digilent Basys 3☆70Updated last year
- ☆41Updated 2 years ago
- Implement a bitonic sorting network on FPGA☆42Updated 3 years ago
- AXI4 BFM in Verilog☆32Updated 8 years ago
- RTL Verilog library for various DSP modules☆85Updated 3 years ago
- round robin arbiter☆70Updated 10 years ago
- verilog实现TPU中的脉动阵列计算卷积的module☆90Updated 3 years ago
- A SystemVerilog implementation of Row-Stationary dataflow and Hierarchical Mesh Network-on-Chip Architecture based on Eyeriss CNN Acceler…☆147Updated 5 years ago
- SpinalHDL-tutorial based on Jupyter Notebook☆132Updated 9 months ago
- General Purpose AXI Direct Memory Access☆49Updated 10 months ago
- Prototype-network-on-chip (ProNoC) is an EDA tool that facilitates prototyping of custom heterogeneous NoC-based many-core-SoC (MCSoC).☆52Updated last week
- A generic implementation of AMBA AXI4 communication protocol. The design provides a master, a slave and an interconnect with multiple mas…☆34Updated 2 years ago
- eyeriss-chisel3☆40Updated 2 years ago
- upgrade to e203 (a risc-v core)☆40Updated 4 years ago