kazkojima / pdmmic-exampleLinks
A simple PDM microphone interface on FPGA
☆13Updated 3 years ago
Alternatives and similar repositories for pdmmic-example
Users that are interested in pdmmic-example are comparing it to the libraries listed below
Sorting:
- A tiny example of PCM to PDM pipeline on FPGA☆22Updated 3 years ago
- Verilog Repository for GIT☆35Updated 4 years ago
- MMC (and derivative standards) host controller☆25Updated 5 years ago
- USB1.1 Host Controller + PHY☆15Updated 4 years ago
- USB Full Speed PHY☆48Updated 5 years ago
- USB 1.1 Host and Function IP core☆24Updated 11 years ago
- SPI-Flash XIP Interface (Verilog)☆48Updated 4 years ago
- USB 2.0 Device IP Core☆73Updated 8 years ago
- Verilog I2C Slave☆24Updated 11 years ago
- DDR3 Controller v1.65, 16 read/write ports, configurable widths, priority, auto-burst size & cache on each port. VGA/HDMI multiwindow vi…☆84Updated last year
- A 32 bit RISCV Based SOC with QSpi , Uart and 8 bit SDRAM Controller tagetted to efebless shuttle program☆20Updated 2 years ago
- Small (Q)SPI flash memory programmer in Verilog☆68Updated 3 years ago
- Ethernet MAC 10/100 Mbps☆30Updated 4 years ago
- Sata 2 Host Controller for FPGA implementation☆18Updated 8 years ago
- FMC card to allow interfacing Xilinx FPGA boards with Jetson TX2 or TX1 via CSI-2 camera interface☆19Updated 2 years ago
- Open-source high performance AXI4-based HyperRAM memory controller☆81Updated 3 years ago
- ULPI Link Wrapper (USB Phy Interface)☆34Updated 5 years ago
- SDIO Device Verilog Core☆24Updated 7 years ago
- Demo of how to use https://github.com/openXC7 tools (yosys+nextpnr-xilinx) to implement the HW side of a custom SoC with RISC-V CPU & our…☆34Updated 10 months ago
- ☆30Updated 8 years ago
- Vivado project for the SP701 Imaging application project☆13Updated 5 years ago
- A port of the DesignStart Cortex-M0 system to the Diligentinc Arty board☆12Updated 7 years ago
- Quad SPI Flash XIP Controller with a direct mapped cache☆12Updated 5 years ago
- MIPI DSI controller☆81Updated 3 years ago
- IP Cores that can be used within Vivado☆27Updated 4 years ago
- Minimal DVI / HDMI Framebuffer☆83Updated 5 years ago
- Verilog Modules for DSP functions and other common tasks to make FPGA development easier and more fun.☆20Updated 10 years ago
- Delta-sigma ADC,PDM audio FPGA Implementation☆73Updated 3 years ago
- An SPI to AXI4-lite bridge for easy interfacing of airhdl register banks with any microcontroller.☆53Updated 2 years ago
- USB -> AXI Debug Bridge☆41Updated 4 years ago