hardware (ASIC) DEFLATE designed for low-latency page-granularity memory compression and implemented in Chisel
☆16Nov 15, 2024Updated last year
Alternatives and similar repositories for ASIC-DEFLATE-for-memory
Users that are interested in ASIC-DEFLATE-for-memory are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Provides the code for the paper "EBPC: Extended Bit-Plane Compression for Deep Neural Network Inference and Training Accelerators" by Luk…☆17Oct 6, 2019Updated 6 years ago
- Chisel wrapper and accelerators for Columbia's Embedded Scalable Platform (ESP)☆25Feb 1, 2020Updated 6 years ago
- ARTICo³ - Dynamic and Partially Reconfigurable Architecture for Run-Time Adaptive, High Performance Embedded Computing☆12Sep 10, 2024Updated last year
- ☆12Feb 16, 2019Updated 7 years ago
- Hardware and script files related to dynamic partial reconfiguration☆11Mar 16, 2018Updated 8 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- ☆23Jun 17, 2022Updated 4 years ago
- ☆69Jun 7, 2017Updated 9 years ago
- Translate the source code of Veriog version to Spinalhdl version☆10Jul 1, 2021Updated 5 years ago
- Implementation of the Advanced Encryption Standard in Chisel☆19Apr 18, 2022Updated 4 years ago
- An out-of-order processor that supports multiple instruction sets.☆23Aug 23, 2022Updated 4 years ago
- A vector processor implemented in Chisel☆21Aug 3, 2014Updated 12 years ago
- use two version gem5 to create spec2006 cpu simpoint & checkpoint☆16Oct 19, 2019Updated 6 years ago
- ☆21Oct 27, 2022Updated 3 years ago
- Ultra96 PYNQ入门之一次简单的总结☆14May 21, 2020Updated 6 years ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- Source code for the Base-Delta-Immediate Compression Algorithm (described in the PACT 2012 paper by Pekhimenko et al. at http://users.ece…☆28Mar 1, 2015Updated 11 years ago
- Template for projects using the Hwacha data-parallel accelerator☆34Nov 13, 2020Updated 5 years ago
- For contributions of Chisel IP to the chisel community.☆73Nov 7, 2024Updated last year
- A Multiplatform benchmark designed to provide holistic, detailed and close-to-hardware view of memory system performance with family of b…☆46Oct 15, 2025Updated 10 months ago
- SpinalHDL USB system for the ULPI based Arrow DECA board☆20Jan 9, 2022Updated 4 years ago
- [FPL'24] This repository contains the source code for the paper “Revealing Untapped DSP Optimization Potentials for FPGA-based Systolic M…☆23May 6, 2024Updated 2 years ago
- MAFIA: Multiple Application Framework for GPU architectures☆28Jan 21, 2022Updated 4 years ago
- Multi-platform topology-aware memory management library☆12Apr 23, 2020Updated 6 years ago
- ☆38Sep 6, 2013Updated 12 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- PCMCsim: An Accurate Phase-Change Memory Controller Simulator and its Performance Analysis (ISPASS 2022)☆10Aug 3, 2024Updated 2 years ago
- ☆12Jul 2, 2024Updated 2 years ago
- ReRAM implementation on CNN☆18Dec 30, 2018Updated 7 years ago
- ☆11Aug 23, 2023Updated 3 years ago
- This serves as a repository for reproducibility of the SC21 paper "In-Depth Analyses of Unified Virtual Memory System for GPU Accelerated…☆37Sep 25, 2023Updated 2 years ago
- Wrappers for open source FPU hardware implementations.☆37Nov 27, 2025Updated 9 months ago
- Python version of tools to work with AIG formatted files☆13May 20, 2025Updated last year
- DeepGate3 for ICCAD2024☆14May 26, 2025Updated last year
- ☆12Dec 26, 2024Updated last year
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- ☆15Apr 18, 2024Updated 2 years ago
- Huffman树，Huffman编码，压缩bmp图像。☆17Sep 6, 2020Updated 5 years ago
- A coverage library for Chisel designs☆11Mar 12, 2020Updated 6 years ago
- IBM Spectrum LSF - IBM Cloud☆16Sep 30, 2024Updated last year
- Panopticon is a complete in-DRAM RowHammer mitigation. This code simulates an implementation of Panopticon in DDR5.☆14Jun 2, 2023Updated 3 years ago
- ☆10Apr 8, 2021Updated 5 years ago
- ☆12Feb 15, 2024Updated 2 years ago