hardware (ASIC) DEFLATE designed for low-latency page-granularity memory compression and implemented in Chisel
☆16Nov 15, 2024Updated last year
Alternatives and similar repositories for ASIC-DEFLATE-for-memory
Users that are interested in ASIC-DEFLATE-for-memory are comparing it to the libraries listed below
Sorting:
- Provides the code for the paper "EBPC: Extended Bit-Plane Compression for Deep Neural Network Inference and Training Accelerators" by Luk…☆19Oct 6, 2019Updated 6 years ago
- Chisel wrapper and accelerators for Columbia's Embedded Scalable Platform (ESP)☆24Feb 1, 2020Updated 6 years ago
- Translate the source code of Veriog version to Spinalhdl version☆10Jul 1, 2021Updated 4 years ago
- ☆11Feb 16, 2019Updated 7 years ago
- Ultra96 PYNQ入门之一次简单的总结☆14May 21, 2020Updated 5 years ago
- An out-of-order processor that supports multiple instruction sets.☆21Aug 23, 2022Updated 3 years ago
- ☆21Jun 17, 2022Updated 3 years ago
- [FPL'24] This repository contains the source code for the paper “Revealing Untapped DSP Optimization Potentials for FPGA-based Systolic M…☆21May 6, 2024Updated last year
- ☆20Oct 27, 2022Updated 3 years ago
- use two version gem5 to create spec2006 cpu simpoint & checkpoint☆16Oct 19, 2019Updated 6 years ago
- Implementation of the Advanced Encryption Standard in Chisel☆19Apr 18, 2022Updated 3 years ago
- SpinalHDL USB system for the ULPI based Arrow DECA board☆20Jan 9, 2022Updated 4 years ago
- This repository contains all (Python 3) code and libraries required for the 2022-2023 Notre Dame Rocketry Team (NDRT) Apogee Control Syst…☆10Apr 30, 2023Updated 2 years ago
- Source code for the Base-Delta-Immediate Compression Algorithm (described in the PACT 2012 paper by Pekhimenko et al. at http://users.ece…☆28Mar 1, 2015Updated 11 years ago
- ARTICo³ - Dynamic and Partially Reconfigurable Architecture for Run-Time Adaptive, High Performance Embedded Computing☆12Sep 10, 2024Updated last year
- Systolic-array based Deep Learning Accelerator generator☆28Dec 11, 2020Updated 5 years ago
- For contributions of Chisel IP to the chisel community.☆71Nov 7, 2024Updated last year
- ☆68Jun 7, 2017Updated 8 years ago
- 1 of 3 winning NVIDIA AI Developer Contest projects: CLARA allows you to use plain english instructions to interface with PowerShell.☆12Feb 24, 2024Updated 2 years ago
- Template for projects using the Hwacha data-parallel accelerator☆34Nov 13, 2020Updated 5 years ago
- ☆36Sep 6, 2013Updated 12 years ago
- An extention of pytorch for low precision training / inference☆10Aug 28, 2023Updated 2 years ago
- ☆36Apr 20, 2021Updated 4 years ago
- VEYE camera module software on RaspberryPi☆36Sep 30, 2025Updated 5 months ago
- ☆38Jun 4, 2024Updated last year
- This serves as a repository for reproducibility of the SC21 paper "In-Depth Analyses of Unified Virtual Memory System for GPU Accelerated…☆39Sep 25, 2023Updated 2 years ago
- Testcase Management Database and Front-end☆14Oct 18, 2010Updated 15 years ago
- RADIX-4 SRT division☆12Oct 31, 2019Updated 6 years ago
- ☆11Aug 23, 2023Updated 2 years ago
- Scan with the LiDAR sensor and render with Metal, then create a custom SCNGeometry and texture it with the saved camera frames☆11Sep 14, 2021Updated 4 years ago
- ☆12Feb 15, 2024Updated 2 years ago
- ☆12Jun 23, 2023Updated 2 years ago
- MathWorks-Excellence-in-Innovation/projects/Behavioral Modelling of Phase-Locked Loop using Deep Learning Techniques/☆10Feb 4, 2022Updated 4 years ago
- Verilog bit slicing for python☆10May 13, 2021Updated 4 years ago
- A Multiplatform benchmark designed to provide holistic, detailed and close-to-hardware view of memory system performance with family of b…☆44Oct 15, 2025Updated 4 months ago
- eyeriss-chisel3☆40May 2, 2022Updated 3 years ago
- 🔥 语音合成(TTS),语音克隆教程: https://dataxujing.github.io/TTS-paper/#/☆11Oct 29, 2024Updated last year
- 微博热搜情绪挖掘分析可视化☆10Dec 5, 2019Updated 6 years ago
- my music☆13Oct 9, 2014Updated 11 years ago