ucb-ee290c / fa18-modemLinks
LTE/WiFi/5G-NR SDR Transceiver
☆55Updated 6 years ago
Alternatives and similar repositories for fa18-modem
Users that are interested in fa18-modem are comparing it to the libraries listed below
Sorting:
- An efficient implementation of the Viterbi decoding algorithm in Verilog☆59Updated last year
- PYNQ example of using the RFSoC as a QPSK transceiver.☆109Updated 2 years ago
- Verilog实现OFDM基带☆44Updated 9 years ago
- PYNQ example of an OFDM Transmitter and Receiver on RFSoC.☆56Updated 2 years ago
- Python productivity for RFSoC platforms☆84Updated last month
- RTL implementation of components for DVB-S2☆130Updated 2 years ago
- IEEE 802.11 OFDM-based transceiver system☆40Updated 7 years ago
- Dual-Mode PSK Transceiver on SDR With FPGA☆48Updated last year
- IEEE 802.16 OFDM-based transceiver system☆28Updated 6 years ago
- FEC Codec IP core library for a some famous codes (BCH, RS, LDPC, Turbo)☆127Updated 3 weeks ago
- Chisel Things for OFDM☆32Updated 5 years ago
- RFSoC QSFP Data Offload Design with GNU Radio☆25Updated last year
- Sythesizable, modular Verilog implementation of 802.11 OFDM decoder.☆126Updated last week
- A basic Soft(Gate)ware Defined Radio architecture☆100Updated last year
- The Strathclyde RFSoC Studio Installer for PYNQ.☆34Updated 2 years ago
- Partial Verilog implimentation of a WiMAX OFDM Phy☆19Updated 13 years ago
- Digital Interpolation Techniques Applied to Digital Signal Processing☆67Updated last year
- Demonstration of Automatic Gain Control with PYNQ☆16Updated 3 years ago
- RFSoC2x2 board repo for PYNQ☆17Updated 3 years ago
- DMA source and sink blocks for Xilinx Zynq FPGAs☆23Updated 5 years ago
- A collection of RFSoC introductory notebooks for PYNQ.☆24Updated 4 years ago
- ☆19Updated 4 years ago
- An RFSoC Frequency Planner developed using Python.☆31Updated 2 years ago
- MATLAB toolbox for ADI transceiver products☆63Updated last month
- Verilog Forward Error Correction Archive: BOX-Muller for fast AWGN generation, Universal Demapper from BPSK to QAM-512, different Forward…☆78Updated 2 years ago
- Standalone application based on ADI hdl and no_OS for ANTSDR.☆22Updated 8 months ago
- Gaussian noise generator Verilog IP core☆32Updated 2 years ago
- Hardware Viterbi Decoder in verilog☆28Updated 6 years ago
- PYNQ-Z1 + AD936X openwifi capable SDR platform☆119Updated 5 months ago
- DVB-S2 LDPC Decoder☆28Updated 11 years ago