Alternatives and similar repositories for gtkwave-filter-process-RISC

Users that are interested in gtkwave-filter-process-RISC are comparing it to the libraries listed below

• tastynoob / aura-core
  "aura" my super-scalar O3 cpu core
  ☆24Updated last year
• Tang-Haojin / YuQuan
  A RISC-V core running Debian (and a LoongArch core running Linux).
  ☆22Updated last year
• ftppz / ShanghaiTech-YSYX
  Unofficial guide for ysyx students applying to ShanghaiTech University
  ☆21Updated 4 months ago
• ysyx-ta / ysyx-summer-readings
  ☆66Updated 10 months ago
• puckbee / moli
  ☆15Updated last week
• OSCPU / chisel-playground
  ☆68Updated 4 months ago
• isnthzy / lightsss-chiplab
  本项目已被合并至官方Chiplab中
  ☆12Updated 5 months ago
• CmdBlockZQG / rvcore-mini-linux
  Build mini linux for your own RISC-V emulator!
  ☆21Updated 9 months ago
• OpenXiangShan / XiangShan-Design-Doc
  Documentation for XiangShan Design
  ☆27Updated 3 weeks ago
• chipsalliance / rvdecoderdb
  The Scala parser to parse riscv/riscv-opcodes generate
  ☆21Updated last week
• arch-simulator-sig / chisel-env
  Basic chisel difftest environment for RTL design (WIP
  ☆18Updated 3 months ago
• XS-MLVP / picker
  Pick your favorite language to verify your chip.
  ☆50Updated last week
• MrAMS / verilogModuleAddPrefix
  verilog module add prefix script 可用于ysyx项目添加学号
  ☆13Updated last year
• OSCPU / ysyxSoC
  ☆86Updated last month
• XS-MLVP / toffee
  A framework for building hardware verification platform using software method
  ☆20Updated 3 weeks ago
• cyyself / soc-simulator
  A Verilator based SoC simulator that allows you to define AXI Slave interface in software.
  ☆49Updated 7 months ago
• OSCPU / yosys-sta
  ☆72Updated 2 months ago
• OpenXiangShan / Deterload
  Xiangshan deterministic workloads generator
  ☆19Updated last month
• OSCPU-Zhoushan / Zhoushan
  Open Source Chip Project by University (OSCPU) - Zhoushan Core
  ☆51Updated 2 years ago
• Seeker0472 / ysyx-linux
  给NEMU移植Linux Kernel!
  ☆18Updated 3 weeks ago
• lizhirui / DreamCoreV2
  ☆22Updated 2 years ago
• Clo91eaf / PUA-MIPS
  NSCSCC 2023 The Second Prize. TEAM PUA FROM HDU.
  ☆13Updated 2 months ago
• NoAXI / NoAXI-LoongArch-CPU
  Second Prize in NSCSCC 2024. Developed by team NoAXI from Hangzhou Dianzi University.
  ☆17Updated 9 months ago
• iFuProcessor / iFuCore
  ☆19Updated 10 months ago
• HIT-MaRiver-mips / cpucore-mariver
  ☆36Updated last year
• OSCPU / openperf
  ☆11Updated 4 months ago
• Kumonda221-CrO3 / gitlab-runner-vivado
  Vivado in GitLab-Runner for GitLab CI/CD
  ☆10Updated 2 years ago
• MrAMS / NagiCore
  顺序单/双发射LA32R处理器 (龙芯杯2024) A LA32R CPU in chisel
  ☆20Updated 7 months ago
• jaypiper / simulator
  ☆31Updated last week
• Superscalar-HIT-Core / Superscalar-HIT-Core-NSCSCC2020
  a Quad-issue, Out-of-order Superscalar MIPS Processor Implemented in SystemVerilog
  ☆48Updated last year