Simple library for decoding RISC-V instructions
☆23Jun 21, 2026Updated 2 months ago
Alternatives and similar repositories for riscv-decode
Users that are interested in riscv-decode are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Hypervisor written in Rust for the RISC-V 1.0 hypervisor extension☆16Oct 21, 2024Updated last year
- ☆13Jun 9, 2022Updated 4 years ago
- ☆15Apr 7, 2026Updated 4 months ago
- Computer architecture learning environment using FPGAs☆15May 17, 2021Updated 5 years ago
- ULX2S / ULX3S FPGA JTAG programmer & tools (Lattice XP2 / ECP5)☆27May 11, 2026Updated 3 months ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- VexRiscv reference platforms for the pqriscv project☆16Mar 9, 2024Updated 2 years ago
- An demonic library to write PE binaries☆11Feb 12, 2024Updated 2 years ago
- Low level access to RISCV processors☆22Oct 3, 2022Updated 3 years ago
- Hypothesis Testing for Polars☆21Aug 2, 2025Updated last year
- Minimal ncurses implementation for use in embedded environments☆12Oct 29, 2017Updated 8 years ago
- The Verilog source code for DRUM approximate multiplier.☆32May 4, 2023Updated 3 years ago
- NixOS Build and Deployment Tool with Configuration Sanity Checking Capabilities [maintainer=@tfc]☆13Sep 18, 2025Updated 11 months ago
- Paging Debug tool for GDB using python☆13Jun 4, 2022Updated 4 years ago
- Let's write an OS which can run on ARM in Rust from scratch! (🚧WIP)☆18Mar 13, 2022Updated 4 years ago
- Serverless GPU API endpoints on Runpod - Get Bonus Credits • AdSkip the infrastructure headaches. Auto-scaling, pay-as-you-go, no-ops approach lets you focus on innovating your application.
- Approximate arithmetic circuits for FPGAs☆13Feb 19, 2020Updated 6 years ago
- 6-stage dual-issue in-order superscalar risc-v cpu☆15Updated this week
- A tool to decode RISC-V and LoongArch and MIPS instructions in gtkwave☆35Apr 13, 2025Updated last year
- Wrappers for open source FPU hardware implementations.☆37Nov 27, 2025Updated 9 months ago
- A tool for USB device pass-through using the vfio-user protocol.☆39Updated this week
- ☆14Jul 16, 2026Updated last month
- Rust crate for numpy NPY files☆33May 3, 2026Updated 4 months ago
- Run Rocket Chip on VCU128☆30Oct 21, 2025Updated 10 months ago
- This repository contains the Simple As Possible Floating Point Unit design based on the IEEE-754 Standard.☆18Mar 17, 2023Updated 3 years ago
- GPUs on demand by Runpod - Special Offer Available • AdRun AI, ML, and HPC workloads on powerful cloud GPUs—without limits or wasted spend. Deploy GPUs in under a minute and pay by the second.
- 方便扩展的Cuda算子理解和优化框架，仅用在学习使用☆18Jun 13, 2024Updated 2 years ago
- Basic floating-point components for RISC-V processors☆12Aug 13, 2017Updated 9 years ago
- 🦜 yair - a high-level compiler IR entirely written in Rust☆37Jul 20, 2026Updated last month
- A wrapper around Minecraft Raspberry Pi to get it working on Novena☆11Sep 25, 2013Updated 12 years ago
- Share JTAG chain within RISCV core and Xilinx FPGA.☆10Sep 17, 2019Updated 6 years ago
- Analyzes whole genome sequencing data for gene-editing verification☆13Updated this week
- note about IC knowledge☆10Sep 7, 2022Updated 3 years ago
- Pipelined Processor which implements RV32i Instruction Set. Also contains pipelined L1 4-way set-associative Instruction Cache, direct-ma…☆15Dec 23, 2022Updated 3 years ago
- NTU Computer Architecture 2021 - CPU with Single issue, L1-cache☆11Jan 24, 2022Updated 4 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- A general slow DDR3 interface. Very little resource consumption. Suits for all FPGAs with 1.5V IO voltage.☆11Dec 14, 2022Updated 3 years ago
- Implementation of ChaCha20 for Cyclone V FPGA (DE10-nano) easily connectable to HPS (ARM processor)☆12Jul 29, 2020Updated 6 years ago
- A collection of curated modules that work great with CTRL-OS (and NixOS)☆17Apr 8, 2026Updated 4 months ago
- HyperBench: A Benchmark Suite for Virtualization Capabilities☆31Nov 22, 2019Updated 6 years ago
- A repository that helps to convert the YOLOv8 detection model to OpenVINO format via onnx and make it more optimized with int8 quantizati…☆12Mar 12, 2023Updated 3 years ago
- Minimal RISC-V Chisel design strictly reflecting the ISA document for verification.☆21Apr 14, 2026Updated 4 months ago
- Cyberus Technology Resilient Linux☆16Aug 27, 2026Updated last week